This work proposes a FPGA-based architecture for accelerating the Continuous GRASP (C-GRASP), a prominent metaheuristic for solving continuous optimization problems. Although FPGA implementations have been proposed for other metaheuristics, nothing has been done for C-GRASP. We conduct a comprehensive set of experiments on well-known hard test problems, and compare our FPGA architecture with C-GRASP implementations running on four other architectures: a single-core ARM Cortex A9-based, a single-core Intel i7-based, a multi-core Intel i7-based, and a GPU-based. Experimental results demonstrate that the proposed architecture outperforms the others in terms of performance-to-power-efficiency. For instance, it is on average 3x faster and 15x less power consuming than the single-core Intel i7-based implementation. Moreover, we introduce a model-based method that helps designers with little experience in FPGA development to use our high-performance architecture to optimize their problem. Our solution is a very interesting option for the emerging technology of FPGA-based data centers (e.g, Microsoft’s Catapult project), and also for resource-constrained embedded systems (e.g., drones).

中文翻译：

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用于连续 GRASP 的基于 FPGA 的加速架构

这项工作提出了一种基于 FPGA 的架构，用于加速连续 GRASP (C-GRASP)，这是一种用于解决连续优化问题的突出元启发式算法。尽管已经为其他元启发式提出了 FPGA 实现，但没有为 C-GRASP 做任何事情。我们对著名的硬测试问题进行了一系列全面的实验，并将我们的 FPGA 架构与在其他四种架构上运行的 C-GRASP 实现进行比较：基于单核 ARM Cortex A9、基于单核 Intel i7、基于多核 Intel i7 和基于 GPU。实验结果表明，所提出的架构在性能与功率效率方面优于其他架构。例如，与基于英特尔 i7 的单核实施相比，它的平均速度提高了 3 倍，功耗降低了 15 倍。而且，我们引入了一种基于模型的方法，可帮助在 FPGA 开发方面经验不足的设计人员使用我们的高性能架构来优化他们的问题。我们的解决方案对于基于 FPGA 的数据中心的新兴技术（例如，Microsoft 的 Catapult 项目）以及资源受限的嵌入式系统（例如，无人机）是一个非常有趣的选择。