Intrinsic Si(111) surfaces passivated with atomic hydrogen are an ideal platform to host two-dimensional electron systems. Traditional methods to probe these surfaces, however, typically involve the placement of dopants and metals directly onto the surface and subsequent high temperature processing, which can be harsh and invasive and lead to surface degradation. Here, we detail a non-invasive gating approach for probing two-dimensional electron systems on intrinsic H-Si(111) surfaces using a silicon-on-insulator (SOI) gating assembly. In this architecture, all harsh device fabrication is performed on a single SOI chip, ensuring that the H-Si(111) surface remains in pristine condition, or as close to the original manufactured intrinsic-Si wafer as possible. To achieve this, we intentionally keep our H-Si(111) surfaces free of any dopants or metals, which are instead placed on the adjacent SOI chip. All electrical components, including Ohmic contacts and accumulation and depletion gates, are housed in the SOI piece. The Ohmic contacts on the SOI piece are brought into physical and electrical contact with the pristine H-Si(111) piece after being van der Waals bonded at room temperature, while all gates on the SOI piece are separated from the H-Si(111) surface by vacuum. Architecture details, baseline operation tests, and 77 K device characterization measurements will be discussed, as well as the implications of going beyond H-Si(111) surfaces and using our device architecture to facilitate transport measurements on halogen-terminated Si surfaces.

中文翻译：

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一种用于探测原始、本征 H-Si(111) 表面上的 2D 电子系统的非侵入式门控方法

用原子氢钝化的本征 Si(111) 表面是承载二维电子系统的理想平台。然而，探测这些表面的传统方法通常涉及将掺杂剂和金属直接放置在表面上，然后进行高温处理，这可能是苛刻和侵入性的，并导致表面退化。在这里，我们详细介绍了一种使用绝缘体上硅 (SOI) 门控组件在本征 H-Si(111) 表面上探测二维电子系统的非侵入性门控方法。在这种架构中，所有苛刻的器件制造都在单个 SOI 芯片上进行，确保 H-Si(111) 表面保持原始状态，或尽可能接近原始制造的本征硅晶片。为实现这一目标，我们有意保持 H-Si(111) 表面不含任何掺杂剂或金属，而是放置在相邻的 SOI 芯片上。所有电子元件，包括欧姆接触以及累积和耗尽栅极，都安装在 SOI 片中。SOI 片上的欧姆接触在室温下范德华键合后与原始 H-Si(111) 片进行物理和电接触，而 SOI 片上的所有栅极都与 H-Si(111) 片分离) 真空表面。将讨论架构细节、基线操作测试和 77 K 器件特性测量，以及超越 H-Si(111) 表面和使用我们的器件架构促进卤素封端 Si 表面传输测量的影响。被安置在 SOI 片中。SOI 片上的欧姆接触在室温下范德华键合后与原始 H-Si(111) 片进行物理和电接触，而 SOI 片上的所有栅极都与 H-Si(111) 片分离) 真空表面。将讨论架构细节、基线操作测试和 77 K 器件特性测量，以及超越 H-Si(111) 表面和使用我们的器件架构促进卤素封端 Si 表面传输测量的影响。被安置在 SOI 片中。SOI 片上的欧姆接触在室温下范德华键合后与原始 H-Si(111) 片进行物理和电接触，而 SOI 片上的所有栅极都与 H-Si(111) 片分离) 真空表面。将讨论架构细节、基线操作测试和 77 K 器件特性测量，以及超越 H-Si(111) 表面和使用我们的器件架构促进卤素封端 Si 表面传输测量的影响。