This brief proposes a two-stage cascoded CMOS LNA with common drain envelope detection based power reduction method for the 5G applications of 28 GHz frequency. Dual inductive peaking and stagger tuning techniques are involved to get a 3 dB bandwidth of 2.25 GHz from 26.75 to 29 GHz. Besides, 22 dB of gain is provided by the proposed LNA. Inductive source degeneration helps to reduce the Noise Figure (NF) of the first cascoded stage, and a 2.3 dB of NF is observed in the LNA. The primarily amplified signals from the first cascoded stage are fed to the envelope detector and the second cascoded stage. When the RF signal is received, the envelope detector output will be high, and it turns on the second cascoded stage. In the existing method, the combination of a diode-connected transistor, low pass filter and buffer has been used for the envelope detection. A common drain transistor with an active resistor and capacitor is used in the envelope detection of the proposed method. Here, the power consumption of the LNA is reduced by 25.26% at the sleep mode. The proposed LNA consumes 9.5 mW and 7.1 mW of power from a 1.5 V supply at the active state and sleep state respectively. It requires 0.1235 mm² of core area in 90 nm technology. Moreover, the behavior of the circuit under process corner variation and temperature variation is analyzed, and Monte–Carlo analysis is performed.

本简介针对28 GHz频率的5G应用，提出了一种基于通用漏极包络检测的两级级联CMOS LNA功率降低方法。涉及双感应峰化和交错调谐技术，可在26.75至29 GHz范围内获得2.25 GHz的3 dB带宽。此外，拟议的低噪声放大器可提供22 dB的增益。感应源退化有助于降低第一级联级的噪声系数（NF），并且在LNA中观察到2.3 dB的NF。来自第一级联级的最初放大的信号被馈送到包络检测器和第二级联级。接收到RF信号后，包络检波器输出将为高电平，并打开第二级联级。在现有方法中，二极管连接的晶体管的组合 低通滤波器和缓冲器已用于包络检测。在该方法的包络检测中使用了具有有源电阻器和电容器的公共漏极晶体管。在此，在休眠模式下，LNA的功耗降低了25.26％。所提议的LNA在活动状态和睡眠状态下分别从1.5 V电源消耗9.5 mW和7.1 mW的功率。需要0.1235毫米90 nm技术中的核心面积为²。此外，分析了电路在工艺角变化和温度变化下的行为，并进行了蒙特卡洛分析。