FinFET devices with and without LDD implantation has been studied for dimensions compatible with leading 14nm technology node. Devices without LDD have better electrostatic characteristics with SS = 65mV/dec and DIBL = 33mV. The nFET transistors with no LDD have device Vtsat mismatch reduction by 20%, together with retained device reliability of HCI as compared to devices with LDD. A full range of device Vtsat flavors is enabled in this experiment, presenting excellent device performances at different operating voltages of 0.55V, 0.8V and 1.2V. All results indicates that devices with no LDD and one less mask in FinFET architecture achieve lower cost, compelling performance and area scaling compared to devices with LDD, for high performance and low power applications.

中文翻译：

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尺寸兼容 14nm 技术节点的 LDD 和无 LDD FinFET 器件的电气特性

已经研究了具有和不具有 LDD 注入的 FinFET 器件的尺寸与领先的 14nm 技术节点兼容。没有 LDD 的器件具有更好的静电特性，SS = 65mV/dec 和 DIBL = 33mV。与具有 LDD 的器件相比，没有 LDD 的 nFET 晶体管的器件 Vtsat 失配降低了 20%，同时保留了 HCI 的器件可靠性。本实验启用了全系列的器件 Vtsat，在 0.55V、0.8V 和 1.2V 的不同工作电压下均表现出出色的器件性能。所有结果都表明，与具有 LDD 的器件相比，在 FinFET 架构中没有 LDD 和少一个掩模的器件实现了更低的成本、引人注目的性能和面积缩放，适用于高性能和低功耗应用。