Reversible circuits have been extensively investigated because of their applications in areas of quantum computing or low-power design. A reversible circuit is composed of only reversible gates and allow computations from primary inputs to primary outputs and vice-versa. In the last decades, synthesis of reversible circuits received significant interest. Additionally, testing of these kinds of circuits has been studied which included different fault models and test approaches dedicated for reversible circuits only. The analysis of testability issues in a reversible circuit commonly involves the detection of the missing gate faults that may occur during the physical realizations of the reversible gates. In this paper, we propose a design for testability (DFT) technique for reversible circuits in which the gates of a circuit are clustered into different sets and the gates from each cluster are then connected to an additional input line where, the additional line acts as an extra control input to the corresponding gate. Such arrangement makes it possible to achieve 100% fault detection in any reversible circuit with a small increase in quantum cost. Experimental evaluations confirm that the proposed DFT technique incurs less quantum cost overhead with 100% fault detection compared to existing DFT techniques for reversible circuits.

中文翻译：

---

可逆逻辑电路可测试性方法的高效设计

可逆电路因其在量子计算或低功耗设计领域的应用而被广泛研究。可逆电路仅由可逆门组成，允许从初级输入到初级输出进行计算，反之亦然。在过去的几十年中，可逆电路的合成受到了极大的关注。此外，已经研究了对这些类型的电路的测试，其中包括不同的故障模型和专用于可逆电路的测试方法。可逆电路中可测试性问题的分析通常涉及检测在可逆门的物理实现期间可能发生的缺失门故障。在本文中，我们提出了一种可逆电路的可测试性设计 (DFT) 技术，其中电路的门被聚集到不同的集合中，然后每个集群的门连接到额外的输入线，其中额外的线充当额外的控制输入到对应的门。这样的安排可以实现100%任何可逆电路中的故障检测，量子成本略有增加。实验评估证实，所提出的 DFT 技术产生的量子成本开销更少100%与可逆电路的现有 DFT 技术相比，故障检测。