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Structural and nanomechanical properties of porous silicon: Cheap substrate for CMOS process industry
Surface and Interface Analysis ( IF 1.6 ) Pub Date : 2020-10-04 , DOI: 10.1002/sia.6885
Yasmina Belaroussi 1 , Gilles Scheen 2 , Abdelhalim A. Saadi 3 , Abdelkader Taibi 1 , Djabar Maafri 1 , Bernard Nysten 4 , Noureddine Gabouze 5 , Jean‐Pierre Raskin 2
Affiliation  

The surface topology of porous silicon (PSi) is a relevant parameter that decides the compatibility of such substrate with CMOS process. Using standard resistivity (1–10 Ω·cm) of Si substrate to fabricate PSi‐S is a low cost solution for the industry. In this paper, through an atomic force microscopy (AFM) analysis, the root mean square (RMS) roughness, the power spectral density and the correlation length were determined for different PSi layers. Furthermore, the measured hardness, Young's modulus, and stress have been made for different thicknesses of PSi: 5, 10, 50, and 200 μm. The obtained results demonstrated that very interesting properties have been achieved with the 50 μm‐thick PSi‐S layer with a maximum porosity around 65%, a surface roughness less than 1 nm and a hardness value of (~1 GPa). The realized results encourage the utilization the PSi‐based substrate into the industry process and thus the development of a Systems‐on‐Chip (SoC).

中文翻译:

多孔硅的结构和纳米力学性能:CMOS工艺行业的廉价基材

多孔硅(PSi)的表面拓扑是决定此类衬底与CMOS工艺兼容性的相关参数。使用标准的硅基板电阻率(1–10Ω·cm)来制造PSi‐S是行业中的低成本解决方案。本文通过原子力显微镜(AFM)分析,确定了不同PSi层的均方根(RMS)粗糙度,功率谱密度和相关长度。此外,对于不同厚度的PSi:5、10、50和200μm,可以测量硬度,杨氏模量和应力。获得的结果表明,厚度为50μm的PSi-S层具有非常有趣的性能,其最大孔隙率约为65%,表面粗糙度小于1 nm,硬度值为(〜1 GPa)。
更新日期:2020-11-13
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