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Temporal State Machines: Using temporal memory to stitch time-based graph computations
arXiv - CS - Emerging Technologies Pub Date : 2020-09-29 , DOI: arxiv-2009.14243
Advait Madhavan, Matthew Daniels, Mark Stiles

Race logic, an arrival-time-coded logic family, has demonstrated energy and performance improvements for applications ranging from dynamic programming to machine learning. However, the ad hoc mappings of algorithms into hardware result in custom architectures making them difficult to generalize. We systematize the development of race logic by associating it with the mathematical field called tropical algebra. This association between the mathematical primitives of tropical algebra and generalized race logic computations guides the design of temporally coded tropical circuits. It also serves as a framework for expressing high level timing-based algorithms. This abstraction, when combined with temporal memory, allows for the systematic generalization of race logic by making it possible to partition feed-forward computations into stages and organizing them into a state machine. We leverage analog memristor-based temporal memories to design a such a state machine that operates purely on time-coded wavefronts. We implement a version of Dijkstra's algorithm to evaluate this temporal state machine. This demonstration shows the promise of expanding the expressibility of temporal computing to enable it to deliver significant energy and throughput advantages.

中文翻译:

时间状态机:使用时间记忆来拼接基于时间的图形计算

Race logic 是一个到达时间编码的逻辑系列,已经展示了从动态编程到机器学习等应用的能量和性能改进。然而,算法到硬件的临时映射导致定制架构使其难以泛化。我们通过将种族逻辑与称为热带代数的数学领域联系起来,将种族逻辑的发展系统化。热带代数的数学原语与广义种族逻辑计算之间的这种关联指导了时间编码热带电路的设计。它还用作表达基于时序的高级算法的框架。这种抽象,当与时间记忆结合时,通过将前馈计算划分为多个阶段并将它们组织成一个状态机成为可能,从而允许对竞争逻辑进行系统化推广。我们利用基于模拟忆阻器的时间存储器来设计这样一种状态机,它纯粹在时间编码波前上运行。我们实现了 Dijkstra 算法的一个版本来评估这个时间状态机。该演示展示了扩展时间计算的可表达性以使其能够提供显着的能量和吞吐量优势的前景。
更新日期:2020-10-01
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