Error Correcting Codes can be used in cryptography since the security of cryptosystems depends heavily on their resilience against attacks such as fault attacks. In the last three decades, Cellular Automata (CA) have been explored as efficient crypto-primitives as well as to generate error correcting codes. In earlier works, CA are mainly used in bit error correction for Single Error Correcting (SEC) and Double Error Detecting (DED) codes. However, in the practical scenario, when fault is injected by a laser beam or using a clock glitch, multiple bits get infected. The situation thus demands detection/correction of multi-bit errors instead of SEC-DED. In literature, linear CA are used for bit as well as byte error correction. But the CA generating linear codes are of very little use in cryptography as they provide little or no security when used as a component in a cryptosystem. In this paper, linear cellular automata (LCA) with nonlinearity injection at some specific cell positions are used for generating error correcting codes (ECC) which can detect and correct errors in $m$-bit symbols ($m$ = 8 for a byte). In this paper, we propose coding schemes for single bit as well as multi-bit error correcting codes. For multi-bit error correcting codes, two schemes are proposed. The schemes can easily be extended for generating ECC for different $m$-bit symbols by simply exploiting $m$-bit LCA with nonlinearity injection. Moreover, the simple and regular structure of the CA makes the ECC scheme very well suited for VLSI implementation.

由于密码系统的安全性在很大程度上取决于其对诸如故障攻击之类的攻击的恢复能力，因此可以在密码术中使用纠错码。在过去的三十年中，已经将Cellular Automata（CA）用作有效的加密基元，并生成纠错码。在较早的著作中，CA主要用于单错误纠正（SEC）和双错误检测（DED）码的位错误纠正。但是，在实际情况下，当通过激光束或使用时钟故障注入故障时，会感染多个位。因此，这种情况要求检测/纠正多位错误而不是SEC-DED。在文献中，线性CA用于位和字节错误校正。但是，生成CA的线性代码在密码学中几乎没有用，因为当用作密码系统的组件时，它们提供的安全性很小或没有。在本文中，使用在某些特定单元位置注入非线性的线性细胞自动机（LCA）来生成纠错码（ECC），该纠错码可以检测和纠正错误。$米$位符号（$米$= 8个字节）。在本文中，我们提出了针对单比特以及多比特纠错码的编码方案。对于多位纠错码，提出了两种方案。该方案可以轻松扩展以生成针对不同类型的ECC$米$通过简单地利用位符号 $米$带非线性注入的位LCA。而且，CA的简单且规则的结构使ECC方案非常适合VLSI实现。