The SRAM-based field-programmable gate array (FPGA) is extremely susceptible to single event upsets (SEUs) on configuration memory which can lead to soft error and malfunction of the circuit. Facing the ever-growing number of configuration bits in modern FPGAs, traditional scrubbing is getting harder to find errors in time, resulting in mismatching between the SEU sensitivity and scrubbing performance. This article proposes a hierarchical scrubbing technique that makes full use of the SEU sensitivity based on the adaptive mean time to detect (MTTD) for each frame. It distinguishes the configuration frames with multipriority and uses different scrubbing methods for different priorities. Also, a model has been built for solving the MTTD allocating problem and enabling an effective scrubbing when SEU occurrence. Moreover, the corresponding hardware architecture is supported and the fault injection-based evaluation on a Xilinx Kintex-7 FPGA is done. The result shows that it can improve mean upsets to failure from $1.56 \times $ to $146.93 \times $ , which is proportional to the mean time to failure (MTTF) improvement.

中文翻译：

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用于缓解基于 SRAM 的 FPGA 的 SEU 的分层清理技术

基于 SRAM 的现场可编程门阵列 (FPGA) 极易受到配置存储器上的单事件翻转 (SEU) 的影响，这可能导致电路出现软错误和故障。面对现代 FPGA 中不断增长的配置位数量，传统的清理越来越难以及时发现错误，导致 SEU 灵敏度和清理性能之间的不匹配。本文提出了一种基于每帧自适应平均检测时间 (MTTD) 的分层擦洗技术，该技术充分利用了 SEU 的敏感性。它区分具有多个优先级的配置帧，并针对不同的优先级使用不同的擦洗方法。此外，还建立了一个模型来解决 MTTD 分配问题，并在 SEU 发生时实现有效清理。而且，支持相应的硬件架构，并在 Xilinx Kintex-7 FPGA 上完成基于故障注入的评估。结果表明，它可以将平均扰乱从 $1.56 \times $ 至 $146.93 \times $ ，这与平均无故障时间 (MTTF) 改进成正比。