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A complete set of logic gates with an identical single-stage structure based on periodic nature of single-electron devices
Journal of Computational Electronics ( IF 2.2 ) Pub Date : 2020-09-27 , DOI: 10.1007/s10825-020-01590-7
Mohammad Javad Sharifi , Mehdi Ahmadian

In this paper, a new method for implementing all two-input logic gates on an identical single-stage structure is proposed. We have used unique characteristics of single-electron transistors, which have periodic output–input relation, to design the gates and implement all two-input logic gates (symmetric/non-symmetric, monotonic/non-monotonic) by a single-stage design including only one single-electron transistor. In conventional monotonic devices, such as BJTs and MOSFETs, implementing non-monotonic logic gates such as XOR and XNOR is impossible with a single-stage circuit and a multistage design is required which leads to more complexity, more chip area and higher power consumption. We present the proposed methodology at first, and then, the details of the designs are investigated. The results are obtained analytically using a new approach named two-potential and then confirmed by numerical methods. Furthermore, important characteristics of the proposed gates such as maximum operating temperature, speed of the gates and frequency limitations, power consumption (static and dynamic) and scaling to other technologies have been investigated. Finally, a general idea has been presented about the application of the introduced approach and gate structures in the field of logic circuit and system designing.



中文翻译:

基于单电子器件的周期性,具有相同单级结构的逻辑门的完整集合

本文提出了一种在相同的单级结构上实现所有两个输入逻辑门的新方法。我们使用具有周期输出-输入关系的单电子晶体管的独特特性来设计门并通过单级设计实现所有两个输入逻辑门(对称/非对称,单调/非单调)仅包括一个单电子晶体管。在传统的单调器件(例如BJT和MOSFET)中,单级电路无法实现非单调逻辑门(例如XOR和XNOR),并且需要多级设计,这会导致更高的复杂性,更多的芯片面积和更高的功耗。我们首先介绍提出的方法,然后研究设计的细节。使用一种称为两势的新方法以解析方式获得结果,然后通过数值方法进行确认。此外,已经研究了所提出的门的重要特性,例如最高工作温度,门的速度和频率限制,功耗(静态和动态)以及按比例缩放到其他技术。最后,提出了关于引入的方法和门结构在逻辑电路和系统设计领域中的应用的总体思路。

更新日期:2020-09-28
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