Classic Reed-Solomon (RS) codes and binary Bose-Chaudhuri-Hocquenghem (BCH) codes, which can be considered as a special case of RS codes, are utilized for error correction in numerous systems, such as Flash memories, optical communications, wireless communications, magnetic storage, and deep-space probing. Additionally, RS and BCH codes are interleaved/nested to form high-gain coding schemes, including product and product-like codes and the recent generalized integrated interleaved codes, which are among the most promising candidates to address the hyper-speed and excellent-correction-capability requirements posed by next-generation terabit/s digital communications and storage. In recent developments, RS codes are also split/nested/coupled to form locally recoverable erasure codes and minimum storage regenerating codes that substantially improve the efficiency of failure recovery and enable the continued scaling of large-scale distributed storage. In this article, prominent decoder architectures for classic RS/BCH codes are elaborated and the fundamental mathematical reformulations leading to the architectures are explained. Then the challenges and recent advancements on the decoder design of nested RS/BCH codes are highlighted. Erasure-correcting RS decoders for failure recovery are also briefly discussed. The goal of this article is to provide comprehensive understanding of state-of-the-art VLSI architectures for classic RS/BCH codes and introduce the most recent architectures for new coding schemes built by nesting/coupling RS/BCH codes for emerging applications.

中文翻译：

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Reed-olomon 代码的 VLSI 架构：经典、嵌套、耦合及其他


经典的里德-所罗门 (RS) 码和二进制 Bose-Chaudhuri-Hocquenghem (BCH) 码（可被视为 RS 码的特例）在许多系统中用于纠错，例如闪存、光通信、无线通信、磁存储和深空探测。此外，RS和BCH码被交织/嵌套以形成高增益编码方案，包括乘积和类乘积码以及最近的广义集成交织码，它们是解决超高速和出色校正问题的最有希望的候选者之一。 - 下一代太比特数字通信和存储提出的能力要求。在最近的发展中，RS码也被分割/嵌套/耦合，形成本地可恢复的纠删码和最小存储再生码，大大提高了故障恢复的效率，并使大规模分布式存储的持续扩展成为可能。在本文中，详细阐述了经典 RS/BCH 代码的著名解码器架构，并解释了导致这些架构的基本数学重构。然后重点介绍了嵌套 RS/BCH 码解码器设计的挑战和最新进展。还简要讨论了用于故障恢复的纠删 RS 解码器。本文的目标是全面了解经典 RS/BCH 代码的最先进 VLSI 架构，并介绍通过嵌套/耦合 RS/BCH 代码为新兴应用构建的新编码方案的最新架构。