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Bit-Vector-Based Hardware Accelerator for DNA Alignment Tools
Journal of Circuits, Systems and Computers ( IF 0.9 ) Pub Date : 2020-09-24 , DOI: 10.1142/s0218126621500870
Daniel Pacheco Bautista 1 , Ricardo Carreño Aguilera 1 , Francisco Aguilar Acevedo 1 , Ignacio Algredo Badillo 2
Affiliation  

Next generation sequencing technologies have noticeably improved in the last decade. Time and cost of whole genome sequencing are important challenges that must be reduced, opening unprecedented opportunities to various research and development areas. The alignment or mapping of small reads produced by sequencing machines to reference genomes of billions of nucleotides is a fundamental task in this sequencing process. It is computationally highly demanding and has become the bottleneck of the DNA analysis process. This paper proposes hardware acceleration based on FPGA of the Myers bit-parallelized algorithm, appropriately modified to be used in the extend stage of DNA alignment tools. The proposed design can be employed in conjunction with software functions, as it constitutes an extremely fast heterogeneous DNA alignment system. The implementation results show a speedup of up to 110× relative to a sequential implementation only in software. In addition, due to the limited use of FPGA resources and the modular design, multiple modules can be used to completely populate the chip, further increasing the computing speed.

中文翻译:

用于 DNA 比对工具的基于位向量的硬件加速器

在过去的十年中,下一代测序技术有了显着的进步。全基因组测序的时间和成本是必须减少的重要挑战,为各个研发领域带来前所未有的机遇。将测序仪产生的小读数与数十亿个核苷酸的参考基因组进行比对或映射是该测序过程中的一项基本任务。它对计算的要求很高,已成为 DNA 分析过程的瓶颈。本文提出了基于FPGA的Myers位并行算法的硬件加速,经过适当修改后可用于DNA比对工具的扩展阶段。所提出的设计可以与软件功能结合使用,因为它构成了一个非常快速的异质 DNA 比对系统。110×相对于仅在软件中的顺序实现。此外,由于FPGA资源的使用有限和模块化设计,可以使用多个模块来完全填充芯片,进一步提高计算速度。
更新日期:2020-09-24
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