A compact coupled source followers (CSFs)-based low-pass filter (LPF) topology is presented with excellent power efficiency and high linearity. It synthesizes a 3^rd-order low-pass transfer function in a single stage that is comprised of two CSFs and three capacitors. It can also be configured to a 2^nd-order by disconnecting a capacitor. A 5^th-order LPF prototype is designed with a cascade of two proposed filter stages in a 0.18- $\mu \text {m}$ CMOS process. Operating under a 1.3-V supply voltage, the filter consumes 0.5-mA total current and achieves a −3 dB bandwidth of 20 MHz. A total harmonic distortion (THD) of −39.5 dBc at the output is measured with a +6.6 dBm (i.e., 1.35 $V_{{\text {pk}-\text {pk}}}$ ) 2-MHz input signal. The measured in-band 3^rd-order input interception point (IIP3) is +24.5 dBm. The resulting dynamic range (DR) at −40 dBc THD is 76.9 dB, with 15.3-nV $\surd $ Hz averaged in-band input-referred noise. The chip occupies an active area of 0.12 mm².

中文翻译：

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基于 77-dB-DR 0.65-mW 20-MHz 五阶耦合源跟随器的低通滤波器

一种基于紧凑型耦合源跟随器 (CSF) 的低通滤波器 (LPF) 拓扑具有出色的功率效率和高线性度。它综合3^次在由两个的CSF和三个电容器的单级阶低通转移函数。它也可以被配置成在2^次通过断开一个电容器阶。有5^个阶LPF原型设计有两个提出的滤波器级的级联在0.18 $\mu \text {m}$ CMOS工艺。在 1.3V 电源电压下工作，滤波器消耗 0.5mA 总电流并实现 20MHz 的 −3dB 带宽。输出端的总谐波失真 (THD) 为 −39.5 dBc，使用 +6.6 dBm（即 1.35 $V_{{\text {pk}-\text {pk}}}$ ) 2-MHz 输入信号。所测得的带3^次阶输入截取点（IIP3）为24.5 dBm的。−40 dBc THD 时的动态范围 (DR) 为 76.9 dB，15.3-nV $\surd $ Hz 平均带内输入参考噪声。该芯片占据0.12 mm ²的有效面积。