A wave dynamic differential logic (WDDL)-based advanced encryption standard (AES) cryptographic circuit is explored as a strong physical unclonable function (PUF) primitive by exploiting the random load capacitance mismatches in WDDL gates induced by the fabrication process. As compared to the regular CMOS logic gates, the WDDL gates enhance the entropy of the proposed WDDL-based AES strong PUF significantly against power attacks. Furthermore, a non-linear product function is applied into the WDDL-based AES strong PUF to generate a high degree of the non-linearity between the input challenges and the output responses against machine-learning attacks. As demonstrated in results, the proposed WDDL-based AES strong PUF primitive achieves an approximately 50.7% inter-hamming distance (HD) and 97.7% reliability with a less than 25% loss ratio of input power entropy after power attacks and a large linear matching error (1032%) against machine-learning attacks.

中文翻译：

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利用平衡逻辑门作为强大的 PUF 来保护物联网免受恶意攻击

通过利用由制造过程引起的 WDDL 门中的随机负载电容失配，将基于波动态差分逻辑 (WDDL) 的高级加密标准 (AES) 密码电路探索为一种强大的物理不可克隆功能 (PUF) 原语。与常规 CMOS 逻辑门相比，WDDL 门显着增强​​了所提出的基于 WDDL 的 AES 强 PUF 的熵，以抵御电源攻击。此外，非线性乘积函数被应用于基于 WDDL 的 AES 强 PUF，以在输入挑战和针对机器学习攻击的输出响应之间产生高度的非线性。如结果所示，所提出的基于 WDDL 的 AES 强 PUF 原语实现了大约 50.7% 的汉明距离 (HD) 和 97。