This paper presents theoretical analysis and design procedures for low noise amplifiers (LNAs) in advanced CMOS technologies. For demonstration, a 30‐GHz LNA designed for 5G millimeter‐wave communication systems was fabricated in a 65‐nm CMOS process. It provides a power gain of 22.6 dB with a noise figure of 3.2 dB while drawing 7.3 mW from a 1.2 V supply.

中文翻译：

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适用于5G通信系统的30 GHz低功耗CMOS LNA

本文介绍了先进CMOS技术中低噪声放大器（LNA）的理论分析和设计过程。为了演示，为65G CMOS工艺制造了为5G毫米波通信系统设计的30GHz LNA。它提供22.6 dB的功率增益，噪声系数为3.2 dB，而从1.2 V电源获取7.3 mW的功率。