Processing techniques for the thickness-controlled layer separation of a single-crystalline semiconductor have been actively developed for manufacturing complementary metal–oxide–semiconductor (CMOS)-technology-based flexible devices. A mechanical separation process for thin semiconductor layers, called the spalling technique, has recently attracted much attention because of its process simplicity, thickness controllability, and kerf-less layer separation. In this paper, we show that the thickness of separated device layers and the residual stress in the layers are critical factors to determine the performance of flexible CMOS devices fabricated with the spalling process. We investigated the electrical characteristics of flexible field-effect transistors (FETs) and CMOS inverters under various stress conditions. The results show that the excessive stress induced in the device layers can cause a severe performance mismatch between n- and p-channel FETs that results in the malfunction of flexible silicon CMOS devices. In addition, we verified that the unrelaxed stress remaining in the device layer after the spalling/transfer process is a major factor degrading the CMOS performance. The results also show that the residual stress induced by the spalling/transfer process as well as the external stress by mechanical bending are significantly dependent on the thickness of the separated device layers.

已经积极开发了用于单晶半导体的厚度受控的层分离的处理技术，用于制造基于互补金属氧化物半导体（CMOS）技术的柔性器件。用于半导体薄层的机械分离工艺，称为剥落技术，由于其工艺简单，厚度可控性和无切口层分离而受到了广泛的关注。在本文中，我们表明，分离的器件层的厚度和层中的残余应力是决定采用剥落工艺制造的柔性CMOS器件性能的关键因素。我们研究了在各种应力​​条件下的柔性场效应晶体管（FET）和CMOS反相器的电气特性。结果表明，器件层中产生的过大应力会导致n沟道FET和p沟道FET之间出现严重的性能不匹配，从而导致柔性硅CMOS器件出现故障。此外，我们验证了散裂/转移过程后保留在器件层中的未松弛应力是降低CMOS性能的主要因素。结果还表明，剥落/转移过程引起的残余应力以及机械弯曲引起的外部应力明显取决于分离的器件层的厚度。我们验证了散裂/转移过程后保留在器件层中的非松弛应力是降低CMOS性能的主要因素。结果还表明，剥落/转移过程引起的残余应力以及机械弯曲引起的外部应力明显取决于分离的器件层的厚度。我们验证了散裂/转移过程后保留在器件层中的非松弛应力是降低CMOS性能的主要因素。结果还表明，剥落/转移过程引起的残余应力以及机械弯曲引起的外部应力明显取决于分离的器件层的厚度。