Nanocommunication in QCA has gain wide range of research interest. Several QCA based nanocommunication architectures have already been reported by researchers. Nevertheless, still there is a wide range of domain to design QCA based architecture for nanocommunication. This work explores the design and implementation of Polar encoder in this route. Polar codes are the technique to achieve reliable data communication. Polar code reduces the block error probability in an exponential order with the asymptotic error exponent having upper bound $\beta <\frac{1}{2}$. This paper demonstrates QCA based low power design of Polar encoder circuit at nano-scale. The design is performed with bottom-up-approach technique. Nanocommunication architecture with Polar code is also demonstrated. Besides, the stuck-at-fault effect in generation of valid Polar codes is explored. Test vectors are proposed to facilitate proper implementation of the encoder circuit. The proposed test vectors are useful in achieving 100% fault coverage. The proposed Polar encoder circuit has low dissipated energy which is confirmed by estimating the energy dissipation. Device area and circuit latency shows that the Polar encoder circuit can operate faster speed at nano-scale level. The simulation result proves the design accuracy of the encoder circuit.

QCA中的纳米通信已经获得了广泛的研究兴趣。研究人员已经报告了几种基于QCA的纳米通信体系结构。然而，仍然存在广泛的领域来设计用于纳米通信的基于QCA的体系结构。这项工作探索了这条路线中Polar编码器的设计和实现。极地码是实现可靠数据通信的技术。极坐标码以指数顺序降低块错误概率，其中渐近错误指数具有上限$\beta <\frac{\mathrm{1个}}{2}$。本文在纳米级演示了基于QCA的Polar编码器电路的低功耗设计。设计采用自下而上的方法进行。还演示了具有Polar代码的纳米通信体系结构。此外，还探讨了在生成有效Polar码时的故障锁定效应。提出了测试向量，以促进编码器电路的正确实现。提出的测试向量可用于实现100％的故障覆盖率。所提出的Polar编码器电路的耗散能量很低，这可以通过估算能量耗散来确定。器件面积和电路等待时间表明，Polar编码器电路可以在纳米级别上以更快的速度运行。仿真结果证明了编码器电路的设计精度。