Energy efficiency continues to be the core design challenge for artificial intelligence (AI) hardware designers. In this paper, we propose a new AI hardware architecture targeting Internet of Things applications. The architecture is founded on the principle of learning automata, defined using propositional logic. The logic-based underpinning enables low-energy footprints as well as high learning accuracy during training and inference, which are crucial requirements for efficient AI with long operating life. We present the first insights into this new architecture in the form of a custom-designed integrated circuit for pervasive applications. Fundamental to this circuit is systematic encoding of binarized input data fed into maximally parallel logic blocks. The allocation of these blocks is optimized through a design exploration and automation flow using field programmable gate array-based fast prototypes and software simulations. The design flow allows for an expedited hyperparameter search for meeting the conflicting requirements of energy frugality and high accuracy. Extensive validations on the hardware implementation of the new architecture using single- and multi-class machine learning datasets show potential for significantly lower energy than the existing AI hardware architectures. In addition, we demonstrate test accuracy and robustness matching the software implementation, outperforming other state-of-the-art machine learning algorithms. This article is part of the theme issue ‘Advanced electromagnetic non-destructive evaluation and smart monitoring’.

中文翻译：

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适用于物联网应用的基于学习自动机的节能人工智能硬件设计

能源效率仍然是人工智能 (AI) 硬件设计人员面临的核心设计挑战。在本文中，我们提出了一种针对物联网应用的新型人工智能硬件架构。该架构基于学习自动机的原理，使用命题逻辑定义。基于逻辑的基础可在训练和推理过程中实现低能耗和高学习准确性，这是高效人工智能和长运行寿命的关键要求。我们以针对普遍应用的定制设计集成电路的形式展示了对这种新架构的初步见解。该电路的基础是对馈入最大并行逻辑块的二进制输入数据进行系统编码。使用基于现场可编程门阵列的快速原型和软件模拟，通过设计探索和自动化流程来优化这些块的分配。该设计流程允许快速超参数搜索，以满足能源节约和高精度的相互冲突的要求。使用单类和多类机器学习数据集对新架构的硬件实现进行了广泛的验证，显示出比现有人工智能硬件架构显着降低能耗的潜力。此外，我们还展示了与软件实现相匹配的测试准确性和稳健性，优于其他最先进的机器学习算法。本文是“先进电磁无损评估与智能监测”主题的一部分。