The full-duplex data communication over on-chip global interconnects suffers from large amounts of amplitude residue echo, leading to the closure of the vertical eye. This work proposes, a residue monitor enabled adaptive echo-cancellation scheme for full-duplex communication with power efficient charge-mode circuits. The proposed architecture employs charge-domain echo cancellation scheme for separating the outbound signal from the inbound signal by precisely controlling the capacitor bank output, thanks to the availability of residue monitor and high precision MOS switches and capacitors at sub-100 nm technology nodes. The residue monitor in the loop tracks the amount of amplitude residue and then sets the control bits, when the loop is locked. Further, this work proposes power efficient charge-mode circuits based replica generation stage, which does not contribute to additional power consumption like in the conventional echo-cancellation schemes. The proposed scheme is implemented at the architectural level with behavioural modeling in Verilog-AMS and also at the circuit level in 1.2 ​V, 65-nm CMOS Technology. The behavioural simulations shows that the residue monitor loop is getting locked while tracking the control voltage generated by the charge regulator for the target near-zero amplitude residue and accordingly control bits to the capacitor bank are set. Circuit level performance shows the functioning at a bidirectional data rate of 20 Gbps over a 1-mm on-chip global interconnect and the extracted received signal has 149 ​mV differential swing at a power consumption of 9.64 ​mW.

片上全局互连上的全双工数据通信遭受大量幅度残留回波的影响，从而导致垂直眼图的闭合。这项工作提出了一种残差监视器使能的自适应回声消除方案，用于与省电的电荷模式电路进行全双工通信。所提出的架构采用电荷域回声消除方案，通过精确控制电容器组的输出来将出站信号与入站信号分离，这要归功于残留监测器以及在100 nm以下技术节点上的高精度MOS开关和电容器。环路中的残差监视器跟踪幅度残差的数量，然后在环路锁定时设置控制位。此外，这项工作提出了基于功率高效的充电模式电路的副本生成阶段，像传统的回声消除方案一样，这不会增加额外的功耗。拟议的方案是在Verilog-AMS中通过行为建模在体系结构级别上实现的，并且也在1.2 V，65 nm CMOS技术的电路级别上实现的。行为仿真表明，残留物监控器回路被锁定，同时跟踪电荷调节器为目标接近零振幅的残留物生成的控制电压，并相应地设置了电容器组的控制位。电路级性能显示在1mm的片上全局互连上以20 Gbps的双向数据速率运行，提取的接收信号具有149mV的差分摆幅，功耗为9.64mW。