Abstract In this work, Metal Insulator Semiconductor (MIS) device is fabricated by depositing Graphene Oxide (GO) layer between the top and bottom Polyvinyl Alcohol (PVA) layers to act as an insulating layer. Topographical study of Ag/PVA/GO/PVA/n-Si/Ag device is done by Field Emission-Scanning Electron Microscopy (FE-SEM) technique. The image clearly showed the multilayered sandwiched structure having GO embedded between PVA layers. The comparative study of the effect of interface trap states, series resistance (Rs) and an insulating layer on the different layers of device performance is done using capacitance-conductance characteristics. The presence of peaks in capacitance-conductance curves revealed the presence of interface trap states in the fabricated device. The C V measurements were taken in the frequency range of 5 kHz to 1 MHz. The interfacial state density (Nss) is found to be of the order of 1011 cm−2 eV−1 which is calculated using Hill-Coleman's method. The increase in leakage current through residual native oxide is verified by calculating the series resistance. The deviation from the ideal behavior of capacitance and conductance characteristics is observed which is attributed to Nss and Rs. The device fabricated unfolded the existence of the capacitance roll-off phenomenon.

中文翻译：

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金属绝缘体半导体Ag/PVA/GO/PVA/n-Si/Ag器件的制备与表征

摘要 在这项工作中，通过在顶部和底部聚乙烯醇 (PVA) 层之间沉积氧化石墨烯 (GO) 层作为绝缘层来制造金属绝缘体半导体 (MIS) 器件。Ag/PVA/GO/PVA/n-Si/Ag 器件的形貌研究是通过场发射扫描电子显微镜 (FE-SEM) 技术完成的。该图像清楚地显示了多层夹层结构，在 PVA 层之间嵌入了 GO。界面陷阱态、串联电阻 (Rs) 和绝缘层对器件性能不同层的影响的比较研究是使用电容-电导特性完成的。电容-电导曲线中峰值的存在表明所制造的器件中存在界面陷阱态。CV 测量是在 5 kHz 至 1 MHz 的频率范围内进行的。发现界面态密度 (Nss) 为 1011 cm-2 eV-1 的数量级，这是使用 Hill-Coleman 方法计算的。通过计算串联电阻来验证通过残余天然氧化物的漏电流的增加。观察到电容和电导特性与理想行为的偏差，这归因于 Nss 和 Rs。所制造的器件展开了电容滚降现象的存在。