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Study of parasitic oscillation of a multi-chip SiC MOSFET circuit based on a signal flow graph model by TCAD simulation
Solid-State Electronics ( IF 1.4 ) Pub Date : 2020-09-08 , DOI: 10.1016/j.sse.2020.107884
Hiroshi Kono , Ichiro Omura

This study presents a novel method to evaluate oscillation condition by technology computer-aided design (TCAD) simulation and is based on a signal flow graph model and a scattering parameter (S-parameter) computed using the TCAD simulation result. The parasitic oscillation of Silicon carbide (SiC) metal–oxide–semiconductor field-effect transistors (MOSFETs) when a short circuit occurs has been investigated with the proposed method. The oscillation conditions of a circuit were computed with this technique and compared with those computed by TCAD transient simulation. The gate resistance to suppress oscillation is similar between these methods. Moreover, the method was also applied to estimate the stability of a circuit consisting of parallelly connected SiC MOSFETs. Two oscillation modes were taken into account. We demonstrated that the circuit parameters required to suppress parasitic oscillation can be computed using a simple calculation.



中文翻译:

基于信号流图模型的TCAD仿真研究多芯片SiC MOSFET电路的寄生振荡

这项研究提出了一种通过技术计算机辅助设计(TCAD)仿真评估振荡条件的新方法,该方法基于信号流图模型和使用TCAD仿真结果计算出的散射参数(S参数)。用提出的方法研究了发生短路时碳化硅(SiC)金属-氧化物-半导体场效应晶体管(MOSFET)的寄生振荡。用这种技术计算电路的振荡条件,并将其与通过TCAD瞬态仿真计算的条件进行比较。这些方法之间抑制振荡的栅极电阻相似。此外,该方法还适用于估算由并联连接的SiC MOSFET组成的电路的稳定性。考虑了两种振荡模式。

更新日期:2020-09-08
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