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Reduction of Phase Noise in Fractional-N Frequency Synthesizer Using Self-Injection Locking Loop
IEEE Transactions on Microwave Theory and Techniques ( IF 4.1 ) Pub Date : 2020-09-01 , DOI: 10.1109/tmtt.2020.3006504
Kang-Chun Peng , Wei-Lung Wu , Jiang-Hong Lin

Delta–sigma modulation-based fractional- $N$ frequency synthesizers generally suffer from quantization noise, which causes them to exhibit poor phase-noise performance outside their loop bandwidth. In this work, a self-injection locking (SIL) loop is utilized in a fractional- $N$ frequency synthesizer. The SIL loop can reduce the noise that is generated by the injection-locked oscillator (ILO), the reference signal, and the delta–sigma modulator, greatly improving the phase-noise performance of the fractional- $N$ frequency synthesizer. Experimental results demonstrate that the phase noise in the developed 2.4-GHz fractional- $N$ frequency synthesizer is reduced by up to 36.5 dB using a 17-ns SIL loop. This great reduction of phase noise enables the developed synthesizer to have a very low phase noise of −110, −136, and −145 dBc/Hz at the offset frequencies of 100 kHz, 1 MHz, and 10 MHz, respectively.

中文翻译:

使用自注入锁定环降低分数 N 频率合成器中的相位噪声

基于 Delta-sigma 调制的分数 $N$ 频率合成器通常会受到量化噪声的影响,这导致它们在环路带宽之外表现出较差的相位噪声性能。在这项工作中,自注入锁定 (SIL) 循环用于分数- $N$ 频率合成器。SIL 环路可以降低注入锁定振荡器 (ILO)、参考信号和 delta-sigma 调制器产生的噪声,大大提高分数-西格玛调制器的相位噪声性能。 $N$ 频率合成器。实验结果表明,所开发的 2.4-GHz 小数 $N$ 使用 17 ns SIL 环路时,频率合成器最多可降低 36.5 dB。相位噪声的这种大幅降低使开发的合成器在 100 kHz、1 MHz 和 10 MHz 的偏移频率下分别具有 -110、-136 和 -145 dBc/Hz 的极低相位噪声。
更新日期:2020-09-01
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