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A Flexible Scan-in Power Control Method in Logic BIST and Its Evaluation with TEG Chips
IEEE Transactions on Emerging Topics in Computing ( IF 5.1 ) Pub Date : 2020-07-01 , DOI: 10.1109/tetc.2017.2767070
Takaaki Kato , Senling Wang , Yasuo Sato , Seiji Kajihara , Xiaoqing Wen

High power dissipation in scan-based logic built-in self-test (LBIST) is a crucial issue that can cause over-testing, reliability degradation, chip damage, and so on. While many sophisticated approaches to low-power testing have been proposed in the past, it remains a serious problem to control the test power of LBIST to a predetermined appropriate level that matches the power requirements of the circuit-under-test. This paper proposes a novel power-control method for LBIST that can control the scan-shift power to an arbitrary level. The proposed method modifies pseudo-random patterns generated by an embedded test pattern generator (TPG) so that the modified patterns have the specific toggle rate without sacrificing fault coverage and test time. In order to evaluate the effectiveness of the proposed method, this paper shows not only simulation-based experimental results but also measurement results on test element group (TEG) chips.

中文翻译:

逻辑BIST中灵活的扫描功率控制方法及其TEG芯片评估

基于扫描的逻辑内置自检 (LBIST) 中的高功耗是一个关键问题,可能导致过度测试、可靠性下降、芯片损坏等。虽然过去已经提出了许多用于低功耗测试的复杂方法,但将 LBIST 的测试功率控制到与被测电路的功率要求相匹配的预定适当水平仍然是一个严重的问题。本文提出了一种新的 LBIST 功率控制方法,可以将扫描移位功率控制在任意水平。所提出的方法修改由嵌入式测试模式生成器 (TPG) 生成的伪随机模式,以便修改后的模式具有特定的触发率,而不会牺牲故障覆盖率和测试时间。为了评估所提出方法的有效性,
更新日期:2020-07-01
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