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Fundamental Thermal Limits on Data Retention in Low-Voltage CMOS Latches and SRAM
IEEE Transactions on Device and Materials Reliability ( IF 2.5 ) Pub Date : 2020-09-01 , DOI: 10.1109/tdmr.2020.2996627
Elahe Rezaei , Marco Donato , William R. Patterson , Alexander Zaslavsky , R. Iris Bahar

Ultra-low-power systems with substantial computing capacity require latches and SRAMs to operate at extremely low supply voltages. However, with aggressive technology scaling, reliability becomes a major challenge due to unavoidable process variations and the presence of multiple noise sources, including intrinsic thermal noise. This paper provides a quantitative measure of reliability by calculating the probability distribution function (PDF) of errors induced by thermal noise in latches and SRAMs operating in subthreshold conditions. Implemented in a novel simulation tool for thermal-noise analysis of CMOS circuits (STTACC), our algorithm uses a stochastic differential equation circuit model that preserves the proper Poissonian statistics for thermal-noise-driven current fluctuations in MOSFETs. Our probabilistic error model can handle error rate analysis for arrays of latches or full SRAMs on time scales from seconds to years without excessive computational overhead. We demonstrate that the time-to-error (TTE) statistics of subthreshold SRAMs obey log-normal distributions that depend on parameters such as node and device capacitance, device threshold variations and operating conditions of supply voltage and temperature. This makes it possible to quantitatively evaluate the asymptotic behavior of extremely rare error events that are inaccessible to standard SPICE-based simulations.

中文翻译:

低压 CMOS 锁存器和 SRAM 中数据保留的基本热限制

具有强大计算能力的超低功耗系统需要锁存器和 SRAM 在极低的电源电压下运行。然而,随着技术的积极扩展,由于不可避免的工艺变化和多种噪声源(包括固有热噪声)的存在,可靠性成为一项重大挑战。本文通过计算在亚阈值条件下运行的锁存器和 SRAM 中由热噪声引起的错误的概率分布函数 (PDF),提供了可靠性的定量测量。在用于 CMOS 电路热噪声分析 (STTACC) 的新型仿真工具中实现,我们的算法使用随机微分方程电路模型,该模型为 MOSFET 中的热噪声驱动电流波动保留适当的泊松统计。我们的概率误差模型可以在从几秒到几年的时间尺度上处理锁存器阵列或完整 SRAM 的错误率分析,而不会产生过多的计算开销。我们证明了亚阈值 SRAM 的错误时间 (TTE) 统计服从对数正态分布,该分布取决于节点和器件电容、器件阈值变化以及电源电压和温度的工作条件等参数。这使得定量评估极其罕见的错误事件的渐近行为成为可能,这些错误事件是基于 SPICE 的标准模拟无法访问的。我们证明了亚阈值 SRAM 的错误时间 (TTE) 统计服从对数正态分布,该分布取决于节点和器件电容、器件阈值变化以及电源电压和温度的工作条件等参数。这使得定量评估极其罕见的错误事件的渐近行为成为可能,这些错误事件是基于 SPICE 的标准模拟无法访问的。我们证明了亚阈值 SRAM 的错误时间 (TTE) 统计服从对数正态分布,该分布取决于节点和器件电容、器件阈值变化以及电源电压和温度的工作条件等参数。这使得定量评估极其罕见的错误事件的渐近行为成为可能,这些错误事件是基于 SPICE 的标准模拟无法访问的。
更新日期:2020-09-01
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