Networks-on-chip (NoCs) are playing a critical role in modern multicore architecture, and NoC security has become a major concern. Maliciously implanted hardware Trojans (HTs) inject faults into on-chip communications that saturate the network, resulting in the leakage of sensitive data via side channels and significant performance degradation. While existing techniques protect NoCs by detecting and isolating HT-infected components, they inevitably incur occasional inaccurate detection with considerable network latency and power overheads. We propose TSA-NoC, a learning-based design framework for secure and efficient on-chip communication. The proposed TSA-NoC uses an artificial neural network for runtime HT-detection with higher accuracy. Furthermore, we propose a deep-reinforcement-learning-based adaptive routing design for HT mitigation with the aim of minimizing network latency and maximizing energy efficiency. Simulation results show that TSA-NoC achieves up to 97% HT-detection accuracy, 70% improved energy efficiency, and 29% reduced network latency as compared to state-of-the-art HT-mitigation techniques.

中文翻译：

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TSA-NoC：用于安全片上网络架构的基于学习的威胁检测和缓解

片上网络 (NoC) 在现代多核架构中发挥着关键作用，NoC 安全性已成为一个主要问题。恶意植入的硬件木马 (HT) 将故障注入片上通信，使网络饱和，导致敏感数据通过侧信道泄漏并显着降低性能。虽然现有技术通过检测和隔离受 HT 感染的组件来保护 NoC，但它们不可避免地偶尔会出现不准确的检测，并具有相当大的网络延迟和电源开销。我们提出了 TSA-NoC，这是一种基于学习的设计框架，用于安全高效的片上通信。提议的 TSA-NoC 使用人工神经网络进行更准确的运行时 HT 检测。此外，我们提出了一种基于深度强化学习的自适应路由设计来缓解 HT，目的是最大限度地减少网络延迟和最大限度地提高能源效率。仿真结果表明，与最先进的 HT 缓解技术相比，TSA-NoC 实现了高达 97% 的 HT 检测准确度、70% 的能效提高和 29% 的网络延迟减少。