Neuromorphic computing describes the use of VLSI systems to mimic neuro-biological architectures and is also looked at as a promising alternative to the traditional von Neumann architecture. Any new computing architecture would need a system that can perform floating-point arithmetic. In this paper, we describe a neuromorphic system that performs IEEE 754-compliant floating-point multiplication. The complex process of multiplication is divided into smaller sub-tasks performed by components Exponent Adder, Bias Subtractor, Mantissa Multiplier and Sign OF/UF. We study the effect of the number of neurons per bit on accuracy and bit error rate, and estimate the optimal number of neurons needed for each component.

中文翻译：

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使用神经形态计算的浮点乘法

神经形态计算描述了使用 VLSI 系统来模拟神经生物学架构，并且也被视为传统冯诺依曼架构的有前途的替代方案。任何新的计算架构都需要一个可以执行浮点运算的系统。在本文中，我们描述了一个执行符合 IEEE 754 标准的浮点乘法的神经形态系统。复杂的乘法过程被分成较小的子任务，由组件指数加法器、偏置减法器、尾数乘法器和符号 OF/UF 执行。我们研究了每比特神经元数量对精度和误码率的影响，并估计每个组件所需的最佳神经元数量。