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Higher-Order Quantifier Elimination, Counter Simulations and Fault-Tolerant Systems
Journal of Automated Reasoning ( IF 0.9 ) Pub Date : 2020-08-29 , DOI: 10.1007/s10817-020-09578-5
Silvio Ghilardi , Elena Pagani

We develop quantifier elimination procedures for fragments of higher order logic arising from the formalization of distributed systems (especially of fault-tolerant ones). Such procedures can be used in symbolic manipulations like the computation of pre/post images and of projections. We show in particular that our procedures are quite effective in producing counter abstractions that can be model-checked using standard SMT technology. In fact, very often in the current literature verification tasks for distributed systems are accomplished via counter abstractions. Such abstractions can sometimes be justified via simulations and bisimulations. In this work, we supply logical foundations to this practice, by our technique for second order quantifier elimination. We implemented our procedure for a simplified (but still expressive) subfragment and we showed that our method is able to successfully handle verification benchmarks from various sources with interesting performances.

中文翻译:

高阶量词消除、反模拟和容错系统

我们为分布式系统(尤其是容错系统)的形式化产生的高阶逻辑片段开发了量词消除程序。此类过程可用于符号操作,例如计算前后图像和投影。我们特别表明,我们的程序在生成可以使用标准 SMT 技术进行模型检查的反抽象方面非常有效。事实上,在当前的文献中,分布式系统的验证任务经常是通过计数器抽象来完成的。这种抽象有时可以通过模拟和互模拟来证明。在这项工作中,我们通过我们的二阶量词消除技术为这种实践提供了逻辑基础。
更新日期:2020-08-29
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