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19.5 μW ultra-low-power 13.56 MHz RFID tag based on transparent zinc-oxide thin-film transistors
IET Circuits, Devices & Systems ( IF 1.0 ) Pub Date : 2020-08-25 , DOI: 10.1049/iet-cds.2019.0406
Xiaoyu Ma 1 , Yan Han 1 , Leixiao Han 1 , Zhi Ye 1
Affiliation  

A novel systematic technological process for ZnO-thin-film transistors (TFTs) fabrication was developed which turned out to achieve near-zero threshold voltage devices with good performance and stability. A deuterium implantation method was realised as well to fabricate depletion n-type ZnO TFTs. The inverters based on enhancement/depletion ZnO TFTs reached nearly full swing (0.01–5 V at 5 V V DD ) and pretty large noise margin ( V NML = 1.01 and V NMH = 3.61 V). Moreover, a transparent radio-frequency identification (RFID) tag chip based on ZnO TFTs was developed. This tag with an anti-collision algorithm for ISO-14443 type-A was first realised under 5 µm ZnO-TFT technology. The proposed RFID tag exhibits ultra-low-power dissipation of <19.5 µW at 3 V V DD and a reasonable chip area of 4.7 mm 2 .

中文翻译:

基于透明氧化锌薄膜晶体管的19.5μW超低功耗13.56 MHz RFID标签

开发了一种新颖的ZnO薄膜晶体管(TFTs)制造的系统技术工艺,结果证明该工艺可实现具有良好性能和稳定性的接近零阈值电压的器件。还实现了氘注入方法以制造耗尽型n型ZnO TFT。基于增强/耗尽型ZnO TFT的逆变器几乎达到满摆幅(5 V时为0.01-5 VV DD )和相当大的噪声容限( V NML = 1.01并且V NMH = 3.61 V)。此外,开发了基于ZnO TFT的透明射频识别(RFID)标签芯片。该标签采用ISO-14443 A型防撞算法,是在5 µm ZnO-TFT技术下首次实现的。拟议的RFID标签在3 V电压下具有<19.5 µW的超低功耗V DD,合理的切屑面积为4.7 mm 2
更新日期:2020-08-28
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