In this brief, we introduce an ultra-low voltage, ultra-low power, inverter-based, discrete-time, 1^st order ${\Delta } {\Sigma }$ modulator. It exploits an original switched-capacitor integrator to achieve interesting performances with supply voltages as low as 0.25 V. It also employs a clock-boosting technique to improve pass-gate operation. A prototype has been designed and produced using a 0.18 $\mu \text{m}$ CMOS process by UMC. The modulator reaches an SNDR of 37.2 dB at a voltage of 0.25 V, with a power consumption of only 2.1 nW, corresponding to a FOM of 140.3 dB. The DC characteristics show an offset of 4.3 mV, a gain error of 2.5% (standard deviations), with an INL of 0.6%.

中文翻译：

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基于 2 nW 0.25 V 140 dB-FOM 逆变器的一阶 Σ 调制器

在这个简短，我们引入一个超低电压，超低功耗，基于逆变器的，离散时间，1^日顺序 ${\Delta } {\Sigma }$ 调制器。它利用原始的开关电容器积分器在低至 0.25 V 的电源电压下实现有趣的性能。它还采用时钟提升技术来改善传输门操作。原型已使用 0.18 $\mu \text{m}$ 联电CMOS工艺。调制器在 0.25 V 电压下达到 37.2 dB 的 SNDR，功耗仅为 2.1 nW，对应于 140.3 dB 的 FOM。DC 特性显示偏移为 4.3 mV，增益误差为 2.5%（标准偏差），INL 为 0.6%。