This brief presents a reconfigurable Random Number Generator (RNG) based on transient effect of ring oscillators. Users can select a method based on the irregular sampling of a regular waveform or on the regular sampling of an irregular waveform to obtain a random bit sequence to be used in different applications, such as lightweight cryptography or high-security communication. The entropy is acquired by exploiting Transient Effect Ring Oscillators (TEROs). The proposed fully-digital RNG structure is firstly implemented on a Zynq-7000 FPGA (Field Programmable Gate Array) without any post-processing method such as the Von Neumann. In addition to the RNG structure, an on-the-line test module based on FIPS 140–2 is also implemented to check the randomness of the produced data statistically in real time. Users can change the statistical test parameters according to their desired security levels. Finally, an ASIC (Application Specific Integrated Circuits) implementation of the proposed RNG is done following the Cadence digital design flow for the TSMC 180 nm CMOS process. The implemented ASIC design occupies an area of 0.85 mm x 0.85 mm and the estimated power required is 11.827 mW.

中文翻译：

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基于环形振荡器瞬态效应的可重构随机数发生器

本简介介绍了一种基于环形振荡器瞬态效应的可重构随机数发生器 (RNG)。用户可以选择基于规则波形的不规则采样或不规则波形的规则采样的方法来获得随机位序列，用于不同的应用，例如轻量级密码学或高安全性通信。熵是通过利用瞬态效应环形振荡器 (TERO) 获得的。所提出的全数字 RNG 结构首先在 Zynq-7000 FPGA（现场可编程门阵列）上实现，没有任何后处理方法，如冯诺依曼。除了RNG结构外，还实现了基于FIPS 140-2的在线测试模块，以实时统计检查产生的数据的随机性。用户可以根据自己所需的安全级别更改统计测试参数。最后，按照 TSMC 180 nm CMOS 工艺的 Cadence 数字设计流程，完成了所提议 RNG 的 ASIC（专用集成电路）实现。实现的 ASIC 设计占地 0.85 mm x 0.85 mm，估计所需功率为 11.827 mW。