Resistive random-access memory (RRAM) devices that can execute logic are promising for in-memory computing. In state-of-the-art, a complementary resistive switch (CRS) bit-cell of two back-to-back bipolar RRAM shows a universal logic gate by multiple sequential write/compute operations using a resistance-based input/output (R-R logic) along with an extra read cycle. Here, we propose and experimentally demonstrate a three-terminal RRAM (3T-RRAM) to enable logic operations with voltage input and resistance output (V-R logic) in a single device and single write/compute cycle without ${a}$ dedicated read cycle. Essentially, a nanoscale (~ 20nm) side-contact is added to a typical two-terminal Pt/Pr_0.7Ca_0.3MnO₃(PCMO)/W RRAM. As the PCMO RRAM is non-filamentary, all the terminals can act as in-out terminals. Hence, we utilize the $3^{rd}$ terminal to read the state of the device while the other two terminals simultaneously performing the logic operation. Finally, we demonstrate the Implication (IMP) and converse IMP logic operations using 3T-RRAM. Such a device can enable area and energy-efficient in-memory computation.

中文翻译：

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用于内存计算的纳米级侧面接触三端 Pr0.7Ca0.3MnO3 电阻式随机存取存储器

可以执行逻辑的电阻式随机存取存储器 (RRAM) 设备有望用于内存计算。在最先进的技术中，互补电阻开关 (CRS) 位单元为二 背靠背双极 RRAM 显示了一个通用逻辑门 多 使用基于电阻的输入/输出（RR 逻辑）以及 额外的读取周期. 在这里，我们提出并通过实验演示了一个三端 RRAM (3T-RRAM) 以实现具有电压输入和电阻输出 (VR 逻辑) 的逻辑操作单一设备 和 单次写入/计算周期，无 ${a}$ 专用读取周期. 本质上，纳米级 (~ 20nm) 侧接触被添加到典型的两端 Pt/Pr _0.7 Ca _0.3 MnO ₃ (PCMO)/W RRAM。由于 PCMO RRAM 是非丝状的，所有的终端都可以作为输入输出终端。因此，我们利用 $3^{第}$ 终端读取设备状态，而另外两个终端同时执行逻辑操作。最后，我们演示了使用 3T-RRAM 的蕴涵 (IMP) 和反向 IMP 逻辑运算。这样的设备可以实现区域和节能的内存计算。