当前位置: X-MOL 学术Solid State Electron. › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
Electrical Properties of MgO/GaN Metal-Oxide-Semiconductor Structures
Solid-State Electronics ( IF 1.4 ) Pub Date : 2020-08-27 , DOI: 10.1016/j.sse.2020.107881
Onoriode N. Ogidi-Ekoko , Justin C. Goodrich , Alexandra J. Howzen , Matthew R. Peart , Nicholas C. Strandwitz , Jonathan J. Wierer , Nelson Tansu

Electrical properties of metal-oxide-semiconductor (MOS) capacitors were measured with MgO / Al2O3 gate dielectrics deposited by atomic layer deposition (ALD) on GaN. For an Al2O3 (1 nm) / MgO (20 nm) dielectric layer, a leakage current density of 0.25 mA/cm2 at 1 V was measured for the MOS capacitor. A peak capacitance of ∼0.1 μF/cm2 was obtained from the C-V measurements with significant hysteresis observed. In addition, a 15-minute forming gas anneal at 450 °C resulted in an increased leakage current density of 1 A/cm2 at 1 V while also increasing the peak capacitance by approximately 30%. To improve the performance, an Al2O3 (20 nm) / MgO (20 nm) dielectric stack was deposited that exhibited a leakage current density of ∼1 x 10-5 mA/cm2 at 1 V, which corresponds to ∼4 orders of magnitude lower current density than that of the single layer dielectric. Additionally, a 3-layer Al2O3 (10 nm) / MgO (20 nm) / Al2O3 (10 nm) stack also shows a leakage current density reduction of ∼4 orders of magnitude, and a reduced density of interface states while remaining a high-k dielectric. The density of interface states was estimated to be between 6.8 x 1011 eV-1cm-2 and 1.5 x 1012 eV-1cm-2 for the 3-layer stack using the photo-assisted C-V method.



中文翻译:

MgO / GaN金属氧化物半导体结构的电学性质

通过在GaN上通过原子层沉积(ALD)沉积的MgO / Al 2 O 3栅极电介质来测量金属氧化物半导体(MOS)电容器的电性能。对于Al 2 O 3(1nm)/ MgO(20nm)介电层,对于MOS电容器,在1V下测得的漏电流密度为0.25mA / cm 2。从CV测量获得的峰值电容为〜0.1μF/ cm 2,观察到明显的滞后现象。另外,在450°C下进行15分钟的成型气体退火会导致在1 V时泄漏电流密度增加到1 A / cm 2,同时还将峰值电容提高大约30%。为了提高性能,Al 2 O沉积3(20 nm)/ MgO(20 nm)电介质叠层,在1 V电压下的漏电流密度为〜1 x 10 -5 mA / cm 2,这比漏电流密度低约4个数量级。单层电介质。此外,三层Al 2 O 3(10 nm)/ MgO(20 nm)/ Al 2 O 3(10 nm)叠层还显示出泄漏电流密度降低了约4个数量级,并且界面密度降低了保持高k电介质状态。界面态的密度估计在6.8 x 10 11 eV -1 cm -2和1.5 x 10 12 eV -1之间使用光辅助CV方法的3层堆栈的cm -2

更新日期:2020-08-27
down
wechat
bug