Approximate computing has received significant recognition for enhancing energy-efficiency in error-resilient applications. This paper proposes bit significance based reconfigurable approximate restoring dividers and square rooters for improved energy-efficiency. Configurable subtractor cells (CSCs) which can function both accurately and approximately are proposed along-with a simplified and scalable overflow detection hardware as major design units. These units are subsequently integrated to form complete divider and square rooter architectures. The CSCs are used to maneuver the input bits based on their progressive significance which affects the accuracy of the design. The proposed approximate designs have the ability to switch between the approximate and accurate operating modes making it suitable for both error-resilient and error-sensitive applications. For 16/8 division the proposed approximate divider reduces energy by 49% with normalized mean error distance of 0.45% when synthesized on CMOS 45-nm technology node. The 16-bit proposed approximate square rooter shows an energy reduction of 36% with marginal accuracy loss. Extensive simulation results of approximate designs are provided and compared with the state-of-the-art approximate designs. The effectiveness of the proposed approximate designs for image processing applications is demonstrated and evaluated.

近似计算已获得公认，可以提高防错应用中的能效。本文提出了基于位重要性的可重构近似恢复除法器和平方根，以提高能效。与主要的设计单元一起，提出了一种可配置的减法器单元（CSC），该单元可精确且近似地工作，并带有简化且可扩展的溢出检测硬件。这些单元随后被集成以形成完整的除法器和平方根架构。CSC用于根据其影响设计准确性的渐进重要性来操纵输入位。所提出的近似设计具有在近似和精确工作模式之间切换的能力，使其既适合于具有弹性的应用程序，也适合于对错误敏感的应用程序。对于16/8除法，当在CMOS 45 nm技术节点上合成时，建议的近似除法器将能量减少49％，归一化平均误差距离为0.45％。建议的16位近似平方根表明能量减少了36％，而边际精度损失很小。提供了近似设计的广泛仿真结果，并将其与最新的近似设计进行了比较。提出并评估了所提出的近似设计在图像处理应用中的有效性。在CMOS 45纳米技术节点上合成时占45％。提议的16位近似平方根表明能量减少了36％，而边际精度降低了。提供了近似设计的广泛仿真结果，并将其与最新的近似设计进行了比较。提出并评估了所提出的近似设计在图像处理应用中的有效性。在CMOS 45纳米技术节点上合成时占45％。提议的16位近似平方根表明能量减少了36％，而边际精度降低了。提供了近似设计的广泛仿真结果，并将其与最新的近似设计进行了比较。提出并评估了所提出的近似设计在图像处理应用中的有效性。