The 13T static random-access memory (SRAM) cell was designed as a low-voltage single-event upset (SEU)-tolerant device for ultralow power space applications, showing full read and write functionality down to the subthreshold voltage of 300 mV. In order to assess the SEU hardness of the device experimentally, it was tested under heavy-ion beams at the Cyclotron Resource Center, Louvain-la-Neuve, Belgium. After irradiation, bit upsets from “1” to “0” were observed, whereas bit upsets from “0” to “1” were extremely rare. Since multiple upsets occurred within addresses, we assume that in addition to random ion hits on the memory cells, the reason for the high SEU rate is ions impinging on the nonhardened peripheral circuitry. Furthermore, heavy-ion experiments and Monte Carlo simulations were performed in order to clarify the upset mechanism.

中文翻译：

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低电压13T抗辐射SRAM位单元的单粒子翻转耐受性研究

13T 静态随机存取存储器 (SRAM) 单元被设计为用于超低功率空间应用的低电压单事件翻转 (SEU) 容错器件，显示低至 300 mV 亚阈值电压的完整读写功能。为了通过实验评估该装置的 SEU 硬度，在比利时 Louvain-la-Neuve 的回旋加速器资源中心在重离子束下对其进行了测试。辐照后，观察到从“1”到“0”的位翻转，而从“0”到“1”的位翻转极为罕见。由于地址内发生多次扰动，我们假设除了随机离子撞击存储单元外，高 SEU 率的原因是离子撞击未硬化的外围电路。此外，还进行了重离子实验和蒙特卡罗模拟，以阐明翻转机制。