A strategy aimed at decreasing dielectric loss in coplanar waveguides (CPWs) and qubits involves the creation of trenches in the underlying substrate within the gaps of the overlying metallization. Participation of contamination layers residing on surfaces and interfaces in these designs can be reduced due to the change in the effective dielectric properties between the groundplane and the conductor metallization. Although finite element method approaches have been previously applied to quantify this decrease, an analytical method is presented that can uniquely address geometries possessing small to intermediate substrate trench depths. Conformal mapping techniques produce transformed CPW and qubit geometries without substrate trenching but a nonuniform contamination layer thickness. By parametrizing this variation, one can calculate surface participation through use of a 2-D, analytical approximation that properly captures singularities in the electric field intensity near the metallization corners and edges. Examples demonstrate two regimes with respect to substrate trench depth that capture an initial increase in substrate-to-air surface participation due to the trench sidewalls and an overall decrease in surface participation due to the reduction in the effective dielectric constant and are compared with experimental measurements to extract loss tangents on this surface.

中文翻译：

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通过衬底开槽对超导共面谐振器和量子位设计的参与减少进行分析建模

旨在降低共面波导 (CPW) 和量子位中介电损耗的策略涉及在上覆金属化间隙内的底层衬底中创建沟槽。由于接地平面和导体金属化之间的有效介电特性发生了变化，因此可以减少这些设计中表面和界面上的污染层的参与。虽然之前已经应用有限元方法来量化这种减少，但提出了一种分析方法，可以唯一地解决具有小到中等衬底沟槽深度的几何形状。共形映射技术产生转换后的 CPW 和量子位几何结构，无需衬底开槽，但污染层厚度不均匀。通过参数化这个变化，人们可以通过使用二维解析近似来计算表面参与度，该近似可以正确捕获金属化角落和边缘附近电场强度的奇点。示例展示了关于衬底沟槽深度的两种机制，它们捕获了由于沟槽侧壁导致的衬底对空气表面参与的初始增加和由于有效介电常数降低导致的表面参与的整体减少，并与实验测量进行了比较提取该表面上的损耗角正切。