This paper investigates a hetero-junction vertical t-shape tunnel field effect transistor and discussed various methods for the suppression of ambipolar conduction for the first-time utilizing computer aided design sentaurus simulation tool. This device is primarily consisting of dual gate silicon based gated p-i-n diode for eminent control over the channel. Further, introduction to the 10 nm silicon germanium layer to the channel makes aggressive improvement to the device characteristics. Unlike to the conventional TFET, we have considered the effective techniques like gate-on-drain overlapping, gate-on-channel underlapping and different drain doping concentration up to 1 × 10¹⁸ cm⁻³, which are used to conquer the ambipolar conduction by increasing the tunneling barrier width at the drain channel edges. The device surface potential performance is also analyzed for different parameters like drain doping concentration, gate-source voltage, silicon germanium Si_1-xGe_x mole fraction x and gate oxide thickness. Moreover, the vertical and lateral electric field inspect for determining the tunneling rate. The path distribution of source channel and drain in vertical direction will increase the scalability of the simulated device.

中文翻译：

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异质结垂直T形TFET抑制双极性传导的参数变化研究

本文研究了一种异质结垂直T形隧道场效应晶体管，并首次讨论了使用计算机辅助设计传感器仿真工具来抑制双极性传导的各种方法。该器件主要由基于栅极的双栅极硅栅控二极管组成，以出色地控制通道。此外，在沟道中引入10 nm硅锗层可大大改善器件的性能。与传统的TFET不同，我们已经考虑了有效的技术，例如栅漏重叠，栅沟道下重叠以及高达1×10 ¹⁸ cm ^-3的不同掺杂浓度，其通过增加漏极沟道边缘处的隧穿势垒宽度来征服双极性传导。还分析了器件表面电势性能的不同参数，例如漏极掺杂浓度，栅极-源极电压，硅锗Si _1-x Ge _x摩尔分数x和栅极氧化物厚度。此外，检查垂直和横向电场以确定隧穿速率。源沟道和漏极在垂直方向上的路径分布将增加仿真设备的可扩展性。