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Optimal design of symmetric fractional delay filter using firefly algorithm
International Journal of Circuit Theory and Applications ( IF 1.8 ) Pub Date : 2020-08-05 , DOI: 10.1002/cta.2853
Savita Srivastava 1 , Atul Kumar Dwivedi 1 , Deepak Nagaria 1
Affiliation  

A fractional delay filter is used to increase the accuracy, preciseness, time synchronization, and stability of signal processing system. However, designing a fractional delay filter for a specified delay, without affecting spectral characteristics of the signal is challenging because of nondifferentiability and multimodal nature of its objective function. In this paper, a more accurate design technique has been proposed for designing fractional delay filters, based on a recently developed firefly algorithm and its improved version. The designed filters offer variable fractional delay. A novel symmetric structure of implementation has been used to design filters. The efficacy of the proposed technique is evaluated by considering a filter design example. The performance of the proposed technique is compared with the other exiting algorithm. The comparative analysis of finite impulse response (FIR) fractional delay filter design proves that the proposed algorithm has a smaller design error and an implementation complexity than the other reported existing algorithms. In addition to this, the designed FIR fractional delay filter is implemented on Xilinx Virtex‐7 for experimental validation.

中文翻译:

基于萤火虫算法的对称分数延迟滤波器的优化设计

分数延迟滤波器用于提高信号处理系统的准确性,准确性,时间同步性和稳定性。然而,由于其目标函数的不可微性和多峰性质,在不影响信号频谱特性的情况下为特定延迟设计分数延迟滤波器具有挑战性。本文基于最近开发的萤火虫算法及其改进版本,提出了一种更精确的设计技术来设计分数延迟滤波器。设计的滤波器提供可变的分数延迟。一种新颖的实施对称结构已用于设计滤波器。通过考虑过滤器设计实例来评估所提出技术的功效。将该技术的性能与其他现有算法进行了比较。有限脉冲响应分数延迟滤波器设计的比较分析表明,与现有的其他算法相比,该算法具有较小的设计误差和实现复杂度。除此之外,在Xilinx Virtex-7上实现了设计的FIR分数延迟滤波器,以进行实验验证。
更新日期:2020-08-05
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