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Efficient hardware implementation and analysis of true random‐number generator based on beta source
ETRI Journal ( IF 1.4 ) Pub Date : 2020-08-04 , DOI: 10.4218/etrij.2020-0083
Seongmo Park 1 , Byoung Gun Choi 1 , Taewook Kang 1 , Kyunghwan Park 1 , Youngsu Kwon 1 , Jongbum Kim 2
Affiliation  

This paper presents an efficient hardware random‐number generator based on a beta source. The proposed generator counts the values of “0” and “1” and provides a method to distinguish between pseudo‐random and true random numbers by comparing them using simple cumulative operations. The random‐number generator produces labeled data indicating whether the count value is a pseudo‐ or true random number according to its bit value based on the generated labeling data. The proposed method is verified using a system based on Verilog RTL coding and LabVIEW for hardware implementation. The generated random numbers were tested according to the NIST SP 800‐22 and SP 800‐90B standards, and they satisfied the test items specified in the standard. Furthermore, the hardware is efficient and can be used for security, artificial intelligence, and Internet of Things applications in real time.

中文翻译:

基于beta源的真正随机数生成器的高效硬件实现和分析

本文介绍了一种基于Beta源的高效硬件随机数生成器。提出的生成器对“ 0”和“ 1”的值进行计数,并提供了一种方法,可以通过使用简单的累加操作比较伪随机数和真实随机数来区分伪随机数和真实随机数。随机数生成器根据生成的标记数据,根据其位值生成指示计数值是伪随机数还是真随机数的标记数据。使用基于Verilog RTL编码和LabVIEW的系统进行硬件验证,验证了该方法的有效性。生成的随机数已根据NIST SP 800-22和SP 800-90B标准进行了测试,并且满足该标准中指定的测试项目。此外,硬件效率很高,可用于安全性,人工智能,
更新日期:2020-08-04
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