It is important to reduce both the size and parasitic of power modules when designing a layout. However, the layout design often relies on experience and was time-consuming. The problem is particularly prominent in silicon carbide (SiC) modules, which requires more parallel dye compared with silicon counterparts. In this study, an algorithm for multi-chip SiC module layout design automation is proposed, which combines genetic algorithm, candidate searching idea, parallel operation and simplified evaluation models for enhancing computational efficiency with reasonable accuracy. A 12-chip half bridge SiC module is studied to verify the feasibility of the proposed method. The results indicate the method is robust and efficient, and can generate optimal layouts with low parasitic inductance and resistance as well as small footprint. It is believed that the method is feasible to guide the automatic optimal layout design for multi-chip SiC modules, targeting small footprint and low parasitic.

中文翻译：

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针对小尺寸和低寄生效应的多芯片SiC模块的高效布局设计自动化

设计布局时，减小电源模块的尺寸和寄生电容非常重要。但是，布局设计通常依赖于经验并且很费时间。该问题在碳化硅（SiC）模块中尤为突出，与硅对应物相比，碳化硅（SiC）模块需要更多的平行染料。提出了一种遗传算法，候选搜索思想，并行运算和简化评估模型相结合的多芯片SiC模块布局设计自动化算法，以合理的精度提高了计算效率。研究了12芯片半桥SiC模块，以验证该方法的可行性。结果表明该方法是鲁棒且高效的，并且可以生成具有低寄生电感和电阻以及较小占位面积的最佳布局。