We explore the potential benefits of using spacer engineering to improve Bulk FinFET electrical and thermal characteristics. Based on the comparative study of five different spacer configurations, the spacer with encased air-gap and Si₃N₄ encapsulation layer is regarded as the most promising gate sidewall scheme for the advanced technology node due to the reduced instinct delay and improved SHEs suppression. The further investigation of the encased air-gap spacer with Si₃N₄ demonstrates that spacer structure parameters have modulation effects on device performance. With the analysis of the normalized RF, analog, digital, thermal and subthreshold regime property parameters, the suitable air-gap percentage window and the determined optimum spacer structure parameters of 14 ​nm Bulk FinFET are proposed.

我们探索使用间隔器工程技术改善Bulk FinFET电气和热特性的潜在好处。基于对五种不同间隔物配置的比较研究，由于减少了本能延迟和改进的SHE抑制，具有封闭气隙和Si ₃ N ₄封装层的间隔物被认为是先进技术节点最有希望的栅极侧壁方案。Si ₃ N ₄封闭气隙垫片的进一步研究证明间隔结构参数对器件性能具有调制作用。通过对归一化的RF，模拟，数字，热和亚阈值状态属性参数进行分析，提出了合适的气隙百分比窗口和确定的14 nm Bulk FinFET的最佳隔离结构参数。