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Thermally Reliable Ultra-Low-Power Voltage Reference to Regulator Converter
Journal of Circuits, Systems and Computers ( IF 0.9 ) Pub Date : 2020-05-12 , DOI: 10.1142/s0218126621500249
George M. Joseph 1 , Emmanouel George 2 , Prathyush S. Pramod 2 , Zameel Nizam 2 , S. Krishnapriya 2 , T. A. Shahul Hameed 2
Affiliation  

A regulated power supply with ultra-low-power consumption, high current efficiency, line, load and thermal stability is an essential part of any high precision electronic system with stringent power budget such as biomedical sensors or military surveillance systems. In this paper, we propose an ultra-low-power, MOSFET only, voltage reference to regulator convertor, proficient to work below 1 V with reduced power consumption. The proposed idea incorporates the provision to integrate any voltage reference module to a comparator-based circuit so as to transform it to a voltage regulator having similar temperature coefficient (TC) and line regulation as that of the interfaced voltage reference. It is also able to produce a reliable output accounting to load fluctuations. The circuit is simulated in 0.18[Formula: see text][Formula: see text]m CMOS technology using Cadence Virtuoso simulation suit. The complete circuit was found to draw a quiescent current of 319.9 pA with a notable current efficiency of 99.99997% at 27C on driving a load of 1[Formula: see text]mA along with a Power Supply Rejection Ratio (PSRR) of [Formula: see text][Formula: see text]dB additional to that of the reference. The proposed circuit will occupy an area of 0.00064[Formula: see text]mm2 and offer a TC as low as 1.7077 ppm/C. The whole MOS approach facilitates a reduction in die area and process simplicity.

中文翻译:

稳压转换器的热可靠超低功耗电压基准

具有超低功耗、高电流效率、线路、负载和热稳定性的稳压电源是任何具有严格功率预算的高精度电子系统(如生物医学传感器或军事监视系统)的重要组成部分。在本文中,我们提出了一种超低功耗、仅 MOSFET、稳压转换器的电压基准,能够在 1 V 以下工作并降低功耗。提议的想法包括将任何电压参考模块集成到基于比较器的电路中,以便将其转换为具有与接口电压参考相似的温度系数 (TC) 和线路调节的电压调节器。它还能够根据负载波动产生可靠的输出。电路在0.18[公式:见正文][公式:见文]m CMOS技术采用Cadence Virtuoso仿真套装。整个电路的静态电流为 319.9 pA,电流效率为 99.99997%,27C 驱动 1[公式:参见文本]mA 的负载以及 [公式:参见文本][公式:参见文本]d​​B 的电源抑制比 (PSRR) 附加到参考值。拟建电路占地0.00064[公式:见正文]mm2并提供低至 1.7077 ppm/ 的 TCC. 整个 MOS 方法有助于减少裸片面积和简化工艺。
更新日期:2020-05-12
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