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Novel Adaptive Controller for Buck Converter with High Resource Efficiency and Low Computational Complexity
Journal of Circuits, Systems and Computers ( IF 0.9 ) Pub Date : 2020-02-24 , DOI: 10.1142/s0218126620502308
Fatemeh Abdi 1 , Parviz Amiri 1 , Mohammad Hosien Refan 1 , Manfred Reddig 2 , Ralph Kennel 3
Affiliation  

Power converters are used in a wide range of industrial processes. Computational complexity, tracking ability, and calculation accuracy are the main parameters that affect the switching performance of power converters. One of the major parts of switch-mode power converters is the controllers which are essential for proper operation. A new adaptive controller is proposed to reduce the computational complexity, the algorithm is presented based on Improved Variable Forgetting Factor (IVFF), Leading Dichotomous Coordinate Descent (DCD), and Exponentially-weighted Recursive Least Square (ERLS). The proposed method estimates the system coefficients with 98% accuracy. The settling time of the output voltage is 0.008[Formula: see text]ms which is faster than other algorithms. According to Leading DCD, this structure needs no multiplier and divider blocks. VFF leads to the improvement of the tracking ability and convergence rate in the system variations. This structure can be implemented on any application that needs an optimal controller. The Vedic mathematics as a multiplier operation is used in the structure of the improved VFF for reducing the calculation delay and area. The error of the proposed method converges to zero with lower than 60 iterations. In other words, the proposed algorithm calculates the optimal coefficients with lower than 50 iterations and is faster than another algorithm.

中文翻译:

具有高资源效率和低计算复杂度的新型降压转换器自适应控制器

功率转换器用于广泛的工业过程。计算复杂度、跟踪能力和计算精度是影响功率转换器开关性能的主要参数。开关模式电源转换器的主要部分之一是控制器,它对于正常运行至关重要。为了降低计算复杂度,提出了一种新的自适应控制器,该算法基于改进的可变遗忘因子(IVFF)、领先二分坐标下降(DCD)和指数加权递归最小二乘(ERLS)。所提出的方法以 98% 的准确度估计系统系数。输出电压的稳定时间为0.008[公式:见正文]ms,比其他算法更快。根据Leading DCD 的说法,这种结构不需要乘法器和除法器块。VFF导致系统变化中跟踪能力和收敛速度的提高。这种结构可以在任何需要最佳控制器的应用程序上实现。吠陀数学作为乘法运算被用于改进的 VFF 结构中,以减少计算延迟和面积。所提出方法的误差在少于 60 次迭代时收敛到零。换言之,所提出的算法以低于 50 次迭代计算最优系数,并且比另一种算法更快。吠陀数学作为乘法运算被用于改进的 VFF 结构中,以减少计算延迟和面积。所提出方法的误差在少于 60 次迭代时收敛到零。换言之,所提出的算法以低于 50 次迭代计算最优系数,并且比另一种算法更快。吠陀数学作为乘法运算被用于改进的 VFF 结构中,以减少计算延迟和面积。所提出方法的误差在少于 60 次迭代时收敛到零。换言之,所提出的算法以低于 50 次迭代计算最优系数,并且比另一种算法更快。
更新日期:2020-02-24
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