A new structure in trench-gate insulated gate bipolar transistor (IGBT) design is proposed and analyzed not only for power loss reduction but also for long-term stability and suppressing electromagnetic interference (EMI) noise using a device simulation. Although turn-off loss and ON-state voltage drop ${V}_{\text {ce(sat)}}$ are improved by injection enhancement (IE) effect, IE effect causes dynamic avalanche that limits turn-off loss reduction and degrades long-term stability by the charge trap at the trench gate oxide interface. In addition, hole current around the gate induces EMI noise due to the negative gate capacitance. This article shows that the proposed surface buffer (SB) IGBT suppresses dynamic avalanche and negative gate capacitance maintaining low power loss by covering the trench gate bottom and hole evacuation from the pMOS channel.

中文翻译：

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表面缓冲 IGBT 具有较高的总体性能

提出并分析了沟槽栅绝缘栅双极晶体管 (IGBT) 设计中的一种新结构，不仅可以降低功率损耗，还可以使用器件仿真来实现长期稳定性和抑制电磁干扰 (EMI) 噪声。尽管注入增强 (IE) 效应改善了关断损耗和导通状态电压降 ${V}_{\text {ce(sat)}}$，但 IE 效应会导致动态雪崩，限制了关断损耗的降低和沟槽栅极氧化物界面处的电荷陷阱降低了长期稳定性。此外，由于负栅极电容，栅极周围的空穴电流会引起 EMI 噪声。