This article discusses the robustness of field-plate-assisted reduced surface field effect (RESURF) DMOS designs to time-dependent latch-up within a single dielectrically isolated device. This work individually characterizes the dopant defined parasitic bipolar parallel to all MOS and uniquely describes the existence of another parasitic bipolar of opposite polarity through the generation of a backgate current as a result of weak impact ionization. These two NPN and PNP bipolar devices in a single DMOS device complete the latch-up mechanism once the product of their gains is greater than one. The characterized time-dependent nature of the increasing backgate current is accounted for by oxide charge trapping in the extended drain region, where measurements of this mechanism over a broad range of application and manufacturing variables enable a mathematical model for the time to failure to be described. Finally, the advantage of analyzing DMOS latch-up robustness in the context of individual parasitic NPN and PNP bipolar devices is shown by its ability to isolate out the separate variables feeding into each bipolar to implement robust solutions.

中文翻译：

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单个 DMOS 内的寄生 NPN 和 PNP 闩锁实现高电压可靠性

本文讨论了场板辅助减小表面场效应 (RESURF) DMOS 设计对单个介电隔离器件内的时间相关闩锁的稳健性。这项工作单独表征了与所有 MOS 平行的掺杂定义的寄生双极，并独特地描述了另一个相反极性的寄生双极的存在，这是由于弱碰撞电离产生的背栅电流。一旦它们的增益乘积大于 1，单个 DMOS 器件中的这两个 NPN 和 PNP 双极器件就完成了闩锁机制。增加背栅电流的随时间变化的特征是由扩展漏区中的氧化物电荷俘获引起的，在广泛的应用和制造变量范围内对这种机制的测量使得能够描述失效时间的数学模型。最后，在单个寄生 NPN 和 PNP 双极器件的背景下分析 DMOS 闭锁稳健性的优势体现在它能够隔离馈入每个双极的单独变量以实现稳健的解决方案。