In the framework of the development of back-side illuminated CMOS image sensors, high-resolution synchrotron tomography has demonstrated a proportionality between electromigration-induced void volumes and time-to-failure in hybrid bonding-based test structures. A new sample preparation workflow has allowed to employ synchrotron-based tomography for statistical studies and to make it a tool for routine measurements. A conventional failure by voiding in long feed lines of the BEoL was observed. Process-induced bonding voids do not affect the reliability of the analyzed samples. Due to nonuniform distribution of the electric current in the region attached to the via matrix, the failure time is sensitive to the exact location and shape of the electromigration-induced void. This observation is important for understanding the role of via redundancy, which is provided by using via matrices, in increasing electromigration robustness of interconnects.

中文翻译：

---

电迁移相关空隙体积与故障时间之间的相关性，高分辨率 X 射线断层扫描的重要支持

在背照式 CMOS 图像传感器的开发框架中，高分辨率同步加速器断层扫描已经证明了电迁移引起的空隙体积与基于混合键合的测试结构的失效时间之间的比例关系。新的样品制备工作流程允许使用基于同步加速器的断层扫描进行统计研究，并使其成为常规测量的工具。观察到由于 BEoL 的长馈线中的空洞而导致的常规故障。工艺引起的键合空隙不会影响分析样品的可靠性。由于连接到通孔矩阵的区域中的电流分布不均匀，故障时间对电迁移引起的空洞的确切位置和形状很敏感。这一观察对于理解过孔冗余的作用很重要，