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A high‐linearity Ka‐band CMOS down‐conversion mixer
Microwave and Optical Technology Letters ( IF 1.0 ) Pub Date : 2020-07-23 , DOI: 10.1002/mop.32524
Chul Woo Byeon 1 , Sang Ho Lee 2 , Jeong Ho Lee 2 , Ju Ho Son 2
Affiliation  

This article presents a high‐linearity Ka‐band complementary metal–oxide–semiconductor (CMOS) down‐conversion mixer. The mixer comprises an RF transconductance stage, switching stage, local oscillator buffer, and intermediate frequency (IF) buffer, and employs modified multiple gate transistors for high linearity. The intermodulation and gain characteristics are analyzed, revealing that the proposed IF buffer can enhance the linearity performance without a gain reduction. Implemented in 65‐nm CMOS technology, the proposed mixer consumes 23 mW and occupies a core chip area of 0.54 mm2. The mixer achieves a conversion gain of 9.3 to 11.1 dB, a noise figure of 8.4 to 9.2 dB, and an output third‐order intercept point of 15.6 to 23.6 dBm at an RF frequency of 37 to 41 GHz.

中文翻译:

高线性度Ka波段CMOS下变频混频器

本文介绍了一种高线性Ka波段互补金属氧化物半导体(CMOS)下变频混频器。混频器包括一个射频跨导级,开关级,本地振荡器缓冲器和中频(IF)缓冲器,并采用改进的多栅极晶体管以实现高线性度。分析了互调和增益特性,表明所提出的IF缓冲器可以在不降低增益的情况下增强线性性能。拟议的混频器采用65 nm CMOS技术实现,功耗为23 mW,占用的核心芯片面积为0.54 mm 2。混频器在37至41 GHz的RF频率下实现9.3至11.1 dB的转换增益,8.4至9.2 dB的噪声系数以及15.6至23.6 dBm的输出三阶交调点。
更新日期:2020-07-23
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