Several ultra-low power and gigahertz current-starved voltage-controlled oscillator (CSVCO) circuits have been proposed and compared here. The presented structures are based on the three-stage hybrid circuit of the carbon nanotube field-effect transistors (CNTFETs) and low-power MOSFETs. The topologies exploit modified and compensated Schmitt trigger comparator parts to demonstrate better consumption power and frequency characteristics. The basic idea in the presented topologies is to compensate the Schmitt trigger comparator part of the basic CSVCO for achieving faster carrier mobility of the holes, reducing transistor leakage current and eliminating dummy transistors.,This study aims to propose and compare three different comparator-based VCOs that have been implemented using the CNTFETs. The considered circuits are shown to be capable of delivering the maximum 35 tuning frequency in the order of 1 GHz to 5 GHz. A major power thirsty part of the high-frequency ring VCOs is the Schmitt trigger stage. Here, several fast and low-power Schmitt trigger topologies are exploited to mitigate the dissipation power and enhance the oscillation frequency.,As a result of proposed modifications, more than one order of magnitude mitigation in the VCO power consumption with respect to the previously presented three-stage CSVCO is reported here. Thus, a VCO dissipation power of 3.5 µW at the frequency of 1.1 GHz and the tuning range of 26 per cent is observed for the well-established 32 nm technology and the supply voltage of 1 V. Such a low dissipation power is obtained around the operating frequency of the battery-powered cellular phones. In addition, using the p-carrier mobility compensation and enhancing the rise time of the Schmitt trigger part of the CSVCO, a maximum of 2.38 times higher oscillation frequency and 72 per cent wider tuning range with respect to Rahane and Kureshi (2017) are observed. Simultaneously, this topology exhibits an average of 20 per cent reduction in the power consumption.,Several new VCO topologies are presented here, and it is shown that they can significantly enhance the power dissipation of the GHz CSVCOs.

中文翻译：

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提议的 3.5 µW CNTFET-MOSFET 混合 CSVCO 用于高能效千兆赫兹应用

这里已经提出并比较了几种超低功耗和千兆赫兹电流匮乏的压控振荡器 (CSVCO) 电路。所提出的结构基于碳纳米管场效应晶体管 (CNTFET) 和低功率 MOSFET 的三级混合电路。该拓扑利用经过修改和补偿的施密特触发器比较器部件来展示更好的功耗和频率特性。所提出拓扑的基本思想是补偿基本 CSVCO 的施密特触发器比较器部分，以实现更快的空穴载流子迁移率，降低晶体管漏电流并消除虚拟晶体管。本研究旨在提出和比较三种不同的比较器已使用 CNTFET 实现的 VCO。所考虑的电路显示能够提供 1 GHz 到 5 GHz 数量级的最大 35 调谐频率。高频环形 VCO 的一个主要耗电部分是施密特触发级。在这里，利用几种快速和低功耗的施密特触发器拓扑来减轻耗散功率并提高振荡频率。由于提出的修改，VCO 功耗相对于先前提出的降低了一个数量级以上此处报告了三阶段 CSVCO。因此，对于成熟的 32 nm 技术和 1 V 的电源电压，在 1.1 GHz 的频率和 26% 的调谐范围下观察到 VCO 耗散功率为 3.5 µW。电池供电的蜂窝电话的工作频率。此外，使用 p 载流子迁移率补偿并增强 CSVCO 施密特触发器部分的上升时间，观察到与 Rahane 和 Kureshi（2017 年）相比，振荡频率最高提高了 2.38 倍，调谐范围扩大了 72% . 同时，这种拓扑的功耗平均降低了 20%。这里介绍了几种新的 VCO 拓扑，结果表明它们可以显着提高 GHz CSVCO 的功耗。