当前位置: X-MOL 学术Microelectron. J. › 论文详情
Our official English website, www.x-mol.net, welcomes your feedback! (Note: you will need to create a separate account there.)
Modeling of TID-induced leakage current in ultra-deep submicron SOI NMOSFETs
Microelectronics Journal ( IF 2.2 ) Pub Date : 2020-07-16 , DOI: 10.1016/j.mejo.2020.104829
Shanxue Xi , Qiwen Zheng , Wu Lu , Jiangwei Cui , Ying Wei , Qi Guo

In order to study the total ionizing dose effects (TID)-induced degradation mechanism of 130 ​nm partially depleted (PD) silicon-on-insulator (SOI) NMOSFETs, a SPICE model including the TID effects was established with Verilog-A.

The total ionizing dose effects will lead to the threshold-voltage shift and the leakage current increase of SOI NMOSFETs. The increase of leakage current in the STI region is the main factor leading to degradation of characteristics of devices, which will form a parasitic transistor. Based on the standard BSIM SOI process model, the SPICE model of leakage current of the STI parasitic transistor is added, and the variation of equivalent gate width and gate oxide thickness caused by radiation-induced trapped charges are considered.

The devices with different width-length-ratios and different bias conditions are considered in our experiments, and the model can effectively reflect the variation of current characteristics before and after radiation, and provide a reference to develop a radiation-hardening technology.



中文翻译:

超深亚微米SOI NMOSFET中TID引起的漏电流建模

为了研究总电离剂量效应(TID)诱导的130纳米部分耗尽(PD)绝缘体上硅(SOI)NMOSFET的降解机理,使用Verilog-A建立了包含TID效应的SPICE模型。

总的电离剂量效应将导致SOI NMOSFET的阈值电压偏移和泄漏电流增加。STI区域中泄漏电流的增加是导致器件特性下降的主要因素,这将形成寄生晶体管。在标准BSIM SOI工艺模型的基础上,添加了STI寄生晶体管泄漏电流的SPICE模型,并考虑了由辐射诱导的俘获电荷引起的等效栅极宽度和栅极氧化物厚度的变化。

实验中考虑了不同宽长比和不同偏置条件的器件,该模型可以有效反映辐射前后电流特性的变化,为开发辐射硬化技术提供参考。

更新日期:2020-07-16
down
wechat
bug