The transition region between the active area and the edge termination of silicon carbide (SiC) MOSFET is either used to place a poly-silicon gate runner (G-MOS) or electrically contacted to the source potential (S-MOS), which is studied experimentally and by TCAD simulation in this work. The simulation results indicate that the transition region of G-MOS can effectively alleviate the propagation delay in the poly-silicon gate and allow all elementary cells to turn on quickly at the same gate voltage magnitude, which leads to a lower on-resistance (R_on), and small switching delay time. On the other hand, the transition region of G-MOS increases the Miller capacitance (C_gd), which can be reduced by shortening the length of the transition region. The simulation results are further validated by the experimental values, which show a reduction of R_on of G-MOS by 2–12% and an increase of C_gd of G-MOS by 72% compared to S-MOS. Moreover, the transition region barely influences the breakdown voltage of the devices, which are both higher than 1700 V.

碳化硅（SiC）MOSFET的有源区域和边缘终端之间的过渡区域用于放置多晶硅栅极流道（G-MOS）或与源极电势（S-MOS）电接触实验和通过TCAD仿真进行这项工作。仿真结果表明，G-MOS的过渡区可以有效地缓解多晶硅栅极中的传播延迟，并允许所有基本单元以相同的栅极电压幅度快速导通，从而降低导通电阻（R_上），并且小开关延迟时间。另一方面，G-MOS的过渡区域增加了米勒电容（C _gd），可以通过缩短过渡区域的长度来减少。通过实验值进一步验证了仿真结果，与S-MOS相比，实验值显示G-MOS的R _on降低了2–12％，G-MOS的C _gd增加了72％。此外，过渡区域几乎不会影响器件的击穿电压，二者均高于1700V。