A Triple-Metal-Gate Vertical Tunnel FET (TMG-VTFET) on the doped silicon body is proposed in this paper. The metal gate is partitioned into three sections in the designed structure, and the work function of the middle section is kept higher as compare to the two other metal gate sections. The difference of the work function and the band gaps between the sources to channel and drain to channel interface builds an in-channel barrier potential that controls the electrons tunneling and ambipolar current effectively. Work function engineering along with TMG structure modulation is carried out to achieve an optimized TMG-VTFET design. The investigation of designed TMG-VTFET is done using the simulation results of the TCAD Silvaco tool and intuitive explanations are given for device behavior. The optimally designed structure exhibits improved performance like a high ON and OFF current ratio (I_ON/I_OFF > 10¹²), low Sub-threshold Slop (SS < 35 mV/Dec), and an improved I_ON current in the range of 10⁻⁴A/μm.

本文提出了一种在掺杂硅体上的三金属栅极垂直隧道FET（TMG-VTFET）。在设计的结构中，金属栅分为三个部分，中间部分的功函数比其他两个金属栅部分要高。功函数的不同以及源到沟道和漏到沟道界面之间的带隙建立了沟道内势垒电位，可有效控制电子隧穿和双极性电流。进行功函数工程设计以及TMG结构调制，以实现优化的TMG-VTFET设计。使用TCAD Silvaco工具的仿真结果对设计的TMG-VTFET进行了研究，并给出了器件行为的直观解释。_ON / I _OFF  > 10 ¹²），低亚阈值斜率（SS <35 mV / Dec），I _ON电流提高到10 ^-4 A /μm。